case 0: case 2: case 8: case 0xC: case 0xD:
                /* x16 NAND Flash */
                pb1550_nand_pd.devwidth = 1;
-               /* fallthrough */
+               fallthrough;
        case 1: case 3: case 9: case 0xE: case 0xF:
                /* x8 NAND, already set up */
                platform_device_register(&pb1550_nand_dev);
 
                case TITAN_CHIP_1060:
                        return "TI AR7 (TNETV1060)";
                }
-               /* fall through */
+               fallthrough;
        default:
                return "TI AR7 (unknown)";
        }
 
        case REV_ID_MAJOR_QCA9533_V2:
                ver = 2;
                ath79_soc_rev = 2;
-               /* fall through */
-
+               fallthrough;
        case REV_ID_MAJOR_QCA9533:
                ath79_soc = ATH79_SOC_QCA9533;
                chip = "9533";
 
        case CPU_BMIPS3300:
                if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
                        __cpu_name[cpu] = "Broadcom BCM6338";
-               /* fall-through */
+               fallthrough;
        case CPU_BMIPS32:
                chipid_reg = BCM_6345_PERF_BASE;
                break;
 
                case STRAPBUS_6368_BOOT_SEL_PARALLEL:
                        return BCM63XX_FLASH_TYPE_PARALLEL;
                }
-               /* fall through */
+               fallthrough;
        default:
                return -EINVAL;
        }
 
                                config.s.qos_mask = 0xff;
                                break;
                        }
-                       /* fall through - to the error case, when Pass 1 */
+                       fallthrough;    /* to the error case, when Pass 1 */
                default:
                        cvmx_dprintf("ERROR: cvmx_pko_config_port: Invalid "
                                     "priority %llu\n",
 
        default:
                pr_err("Invalid UCTL clock rate of %u, using 12000000 instead\n",
                        clock_rate);
-               /* Fall through */
+               fallthrough;
        case 12000000:
                clk_rst_ctl.s.p_refclk_div = 0;
                break;
                                new_f[0] = cpu_to_be32(48000000);
                                fdt_setprop_inplace(initial_boot_params, usbn,
                                                    "refclk-frequency",  new_f, sizeof(new_f));
-                               /* Fall through ...*/
+                               fallthrough;
                        case USB_CLOCK_TYPE_REF_12:
                                /* Missing "refclk-type" defaults to external. */
                                fdt_nop_property(initial_boot_params, usbn, "refclk-type");
 
        default:
                dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n",
                        clock_rate);
-               /* fall through */
+               fallthrough;
        case 100000000:
                mpll_mul = 0x19;
                if (ref_clk_sel < 2)
 
        case MACH_DS5900:
                tbus->ext_slot_base = 0x20000000;
                tbus->ext_slot_size = 0x20000000;
-               /* fall through */
+               fallthrough;
        case MACH_DS5000_1XX:
                tbus->num_tcslots = 3;
                break;
 
                /* we only have a 32-bit FPU */
                return SIGFPE;
 #endif
-               /* fall through */
+               fallthrough;
        case FPU_32BIT:
                if (cpu_has_fre) {
                        /* clear FRE */
 
        case OCTEON_CN78XX & OCTEON_FAMILY_MASK:
                if (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))
                        return 0x0000000000003CB0ull;
-               /* Else, fall through */
+               fallthrough;
        default:
                return 0x0000000000023CB0ull;
        }
 
                        return 6;
                if (PAGE_SIZE > (256 << 10))
                        return 7; /* reserved */
-                       /* fall through */
+               fallthrough;
        case MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT:
                return (PAGE_SHIFT - 10) / 2;
        default:
 
                        regs->regs[31] = regs->cp0_epc +
                                dec_insn.pc_inc +
                                dec_insn.next_pc_inc;
-                       /* Fall through */
+                       fallthrough;
                case mm_bltz_op:
                        if ((long)regs->regs[insn.mm_i_format.rs] < 0)
                                *contpc = regs->cp0_epc +
                        regs->regs[31] = regs->cp0_epc +
                                        dec_insn.pc_inc +
                                        dec_insn.next_pc_inc;
-                       /* Fall through */
+                       fallthrough;
                case mm_bgez_op:
                        if ((long)regs->regs[insn.mm_i_format.rs] >= 0)
                                *contpc = regs->cp0_epc +
                        unsigned int bit;
 
                        bc_false = 1;
-                       /* Fall through */
+                       fallthrough;
                case mm_bc2t_op:
                case mm_bc1t_op:
                        preempt_disable();
                case mm_jalrs16_op:
                        regs->regs[31] = regs->cp0_epc +
                                dec_insn.pc_inc + dec_insn.next_pc_inc;
-                       /* Fall through */
+                       fallthrough;
                case mm_jr16_op:
                        *contpc = regs->regs[insn.mm_i_format.rs];
                        return 1;
        case mm_jal32_op:
                regs->regs[31] = regs->cp0_epc +
                        dec_insn.pc_inc + dec_insn.next_pc_inc;
-               /* Fall through */
+               fallthrough;
        case mm_j32_op:
                *contpc = regs->cp0_epc + dec_insn.pc_inc;
                *contpc >>= 27;
                switch (insn.r_format.func) {
                case jalr_op:
                        regs->regs[insn.r_format.rd] = epc + 8;
-                       /* Fall through */
+                       fallthrough;
                case jr_op:
                        if (NO_R6EMU && insn.r_format.func == jr_op)
                                goto sigill_r2r6;
                case bltzl_op:
                        if (NO_R6EMU)
                                goto sigill_r2r6;
-                       /* fall through */
+                       fallthrough;
                case bltz_op:
                        if ((long)regs->regs[insn.i_format.rs] < 0) {
                                epc = epc + 4 + (insn.i_format.simmediate << 2);
                case bgezl_op:
                        if (NO_R6EMU)
                                goto sigill_r2r6;
-                       /* fall through */
+                       fallthrough;
                case bgez_op:
                        if ((long)regs->regs[insn.i_format.rs] >= 0) {
                                epc = epc + 4 + (insn.i_format.simmediate << 2);
        case jalx_op:
        case jal_op:
                regs->regs[31] = regs->cp0_epc + 8;
-               /* fall through */
+               fallthrough;
        case j_op:
                epc += 4;
                epc >>= 28;
        case beql_op:
                if (NO_R6EMU)
                        goto sigill_r2r6;
-               /* fall through */
+               fallthrough;
        case beq_op:
                if (regs->regs[insn.i_format.rs] ==
                    regs->regs[insn.i_format.rt]) {
        case bnel_op:
                if (NO_R6EMU)
                        goto sigill_r2r6;
-               /* fall through */
+               fallthrough;
        case bne_op:
                if (regs->regs[insn.i_format.rs] !=
                    regs->regs[insn.i_format.rt]) {
        case blezl_op: /* not really i_format */
                if (!insn.i_format.rt && NO_R6EMU)
                        goto sigill_r2r6;
-               /* fall through */
+               fallthrough;
        case blez_op:
                /*
                 * Compact branches for R6 for the
        case bgtzl_op:
                if (!insn.i_format.rt && NO_R6EMU)
                        goto sigill_r2r6;
-               /* fall through */
+               fallthrough;
        case bgtz_op:
                /*
                 * Compact branches for R6 for the
 
        case MIPS_CPU_ISA_M64R2:
                c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2;
                set_elf_base_platform("mips64r2");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_M64R1:
                c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1;
                set_elf_base_platform("mips64");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_V:
                c->isa_level |= MIPS_CPU_ISA_V;
                set_elf_base_platform("mips5");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_IV:
                c->isa_level |= MIPS_CPU_ISA_IV;
                set_elf_base_platform("mips4");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_III:
                c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
                set_elf_base_platform("mips3");
        case MIPS_CPU_ISA_M64R6:
                c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6;
                set_elf_base_platform("mips64r6");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_M32R6:
                c->isa_level |= MIPS_CPU_ISA_M32R6;
                set_elf_base_platform("mips32r6");
        case MIPS_CPU_ISA_M32R2:
                c->isa_level |= MIPS_CPU_ISA_M32R2;
                set_elf_base_platform("mips32r2");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_M32R1:
                c->isa_level |= MIPS_CPU_ISA_M32R1;
                set_elf_base_platform("mips32");
-               /* fall through */
+               fallthrough;
        case MIPS_CPU_ISA_II:
                c->isa_level |= MIPS_CPU_ISA_II;
                set_elf_base_platform("mips2");
                                  MIPS_CONF4_VTLBSIZEEXT_SHIFT) * 0x40;
                        c->tlbsize = c->tlbsizevtlb;
                        ftlb_page = MIPS_CONF4_VFTLBPAGESIZE;
-                       /* fall through */
+                       fallthrough;
                case MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT:
                        if (mips_ftlb_disabled)
                                break;
        switch (__get_cpu_type(c->cputype)) {
        case CPU_I6500:
                c->options |= MIPS_CPU_SHARED_FTLB_ENTRIES;
-               /* fall-through */
+               fallthrough;
        case CPU_I6400:
                c->options |= MIPS_CPU_SHARED_FTLB_RAM;
-               /* fall-through */
+               fallthrough;
        default:
                break;
        }
                default:
                        break;
                }
-       /* fall-through */
+               fallthrough;
        case PRID_IMP_XBURST_REV2:
                c->cputype = CPU_XBURST;
                c->writecombine = _CACHE_UNCACHED_ACCELERATED;
 
                 */
                if (IS_ENABLED(CONFIG_MIPS_EJTAG_FDC_TTY))
                        break;
-               /* fall through */
+               fallthrough;
        case CPU_M14KC:
        case CPU_M14KEC:
        case CPU_24K:
 
                        err = SIGILL;
                        break;
                }
-               /* fall through */
+               fallthrough;
        case beql_op:
        case bnel_op:
                if (delay_slot(regs)) {
 
                                regs->regs[2] = EINTR;
                                break;
                        }
-               /* fallthrough */
+                       fallthrough;
                case ERESTARTNOINTR:
                        regs->regs[7] = regs->regs[26];
                        regs->regs[2] = regs->regs[0];
 
                        force_sig(SIGILL);
                        break;
                }
-               /* Fall through.  */
-
+               fallthrough;
        case 1: {
                void __user *fault_addr;
                unsigned long fcr31;
 
        case 4:
                write_c0_watchlo3(watches->watchlo[3]);
                write_c0_watchhi3(watchhi | watches->watchhi[3]);
-               /* fall through */
+               fallthrough;
        case 3:
                write_c0_watchlo2(watches->watchlo[2]);
                write_c0_watchhi2(watchhi | watches->watchhi[2]);
-               /* fall through */
+               fallthrough;
        case 2:
                write_c0_watchlo1(watches->watchlo[1]);
                write_c0_watchhi1(watchhi | watches->watchhi[1]);
-               /* fall through */
+               fallthrough;
        case 1:
                write_c0_watchlo0(watches->watchlo[0]);
                write_c0_watchhi0(watchhi | watches->watchhi[0]);
                BUG();
        case 4:
                watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask);
-               /* fall through */
+               fallthrough;
        case 3:
                watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask);
-               /* fall through */
+               fallthrough;
        case 2:
                watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask);
-               /* fall through */
+               fallthrough;
        case 1:
                watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask);
        }
                BUG();
        case 8:
                write_c0_watchlo7(0);
-               /* fall through */
+               fallthrough;
        case 7:
                write_c0_watchlo6(0);
-               /* fall through */
+               fallthrough;
        case 6:
                write_c0_watchlo5(0);
-               /* fall through */
+               fallthrough;
        case 5:
                write_c0_watchlo4(0);
-               /* fall through */
+               fallthrough;
        case 4:
                write_c0_watchlo3(0);
-               /* fall through */
+               fallthrough;
        case 3:
                write_c0_watchlo2(0);
-               /* fall through */
+               fallthrough;
        case 2:
                write_c0_watchlo1(0);
-               /* fall through */
+               fallthrough;
        case 1:
                write_c0_watchlo0(0);
        }
 
                switch (insn.r_format.func) {
                case jalr_op:
                        arch->gprs[insn.r_format.rd] = epc + 8;
-                       /* Fall through */
+                       fallthrough;
                case jr_op:
                        nextpc = arch->gprs[insn.r_format.rs];
                        break;
                /* These are unconditional and in j_format. */
        case jal_op:
                arch->gprs[31] = instpc + 8;
-               /* fall through */
+               fallthrough;
        case j_op:
                epc += 4;
                epc >>= 28;
 
        case lhu_op:
                vcpu->mmio_needed = 1;  /* unsigned */
-               /* fall through */
+               fallthrough;
        case lh_op:
                run->mmio.len = 2;
                break;
 
        case lbu_op:
                vcpu->mmio_needed = 1;  /* unsigned */
-               /* fall through */
+               fallthrough;
        case lb_op:
                run->mmio.len = 1;
                break;
 
                                        regs->cp0_epc + dec_insn.pc_inc +
                                        dec_insn.next_pc_inc;
                        }
-                       /* fall through */
+                       fallthrough;
                case jr_op:
                        /* For R6, JR already emulated in jalr_op */
                        if (NO_R6EMU && insn.r_format.func == jr_op)
                        regs->regs[31] = regs->cp0_epc +
                                dec_insn.pc_inc +
                                dec_insn.next_pc_inc;
-                       /* fall through */
+                       fallthrough;
                case bltzl_op:
                        if (NO_R6EMU)
                                break;
-                       /* fall through */
+                       fallthrough;
                case bltz_op:
                        if ((long)regs->regs[insn.i_format.rs] < 0)
                                *contpc = regs->cp0_epc +
                        regs->regs[31] = regs->cp0_epc +
                                dec_insn.pc_inc +
                                dec_insn.next_pc_inc;
-                       /* fall through */
+                       fallthrough;
                case bgezl_op:
                        if (NO_R6EMU)
                                break;
-                       /* fall through */
+                       fallthrough;
                case bgez_op:
                        if ((long)regs->regs[insn.i_format.rs] >= 0)
                                *contpc = regs->cp0_epc +
                break;
        case jalx_op:
                set_isa16_mode(bit);
-               /* fall through */
+               fallthrough;
        case jal_op:
                regs->regs[31] = regs->cp0_epc +
                        dec_insn.pc_inc +
                        dec_insn.next_pc_inc;
-               /* fall through */
+               fallthrough;
        case j_op:
                *contpc = regs->cp0_epc + dec_insn.pc_inc;
                *contpc >>= 28;
        case beql_op:
                if (NO_R6EMU)
                        break;
-               /* fall through */
+               fallthrough;
        case beq_op:
                if (regs->regs[insn.i_format.rs] ==
                    regs->regs[insn.i_format.rt])
        case bnel_op:
                if (NO_R6EMU)
                        break;
-               /* fall through */
+               fallthrough;
        case bne_op:
                if (regs->regs[insn.i_format.rs] !=
                    regs->regs[insn.i_format.rt])
        case blezl_op:
                if (!insn.i_format.rt && NO_R6EMU)
                        break;
-               /* fall through */
+               fallthrough;
        case blez_op:
 
                /*
        case bgtzl_op:
                if (!insn.i_format.rt && NO_R6EMU)
                        break;
-               /* fall through */
+               fallthrough;
        case bgtz_op:
                /*
                 * Compact branches for R6 for the
                        return 1;
                }
                /* R2/R6 compatible cop1 instruction */
-               /* fall through */
+               fallthrough;
        case cop2_op:
        case cop1x_op:
                if (insn.i_format.rs == bc_op) {
                        case bcfl_op:
                                if (cpu_has_mips_2_3_4_5_r)
                                        likely = 1;
-                               /* fall through */
+                               fallthrough;
                        case bcf_op:
                                cond = !cond;
                                break;
                        case bctl_op:
                                if (cpu_has_mips_2_3_4_5_r)
                                        likely = 1;
-                               /* fall through */
+                               fallthrough;
                        case bct_op:
                                break;
                        }
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                if (zc == IEEE754_CLASS_INF)
                        return ieee754dp_inf(zs);
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                DPDNORMY;
                break;
 
 
        case IEEE754_CLASS_DNORM:
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case IEEE754_CLASS_NORM:
                if (xs) {
                        /* sqrt(-x) = Nan */
                switch (oldcsr.rm) {
                case FPU_CSR_RU:
                        y.bits += 1;
-                       /* fall through */
+                       fallthrough;
                case FPU_CSR_RN:
                        t.bits += 1;
                        break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                DPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                /* normalize ym,ye */
                DPDNORMY;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
        case IEEE754_CLASS_SNAN:
                x = ieee754dp_nanxcpt(x);
                EXPLODEXDP;
-               /* fall through */
-
+               fallthrough;
        case IEEE754_CLASS_QNAN:
                y = ieee754sp_nan_fdp(xs, xm);
                if (!ieee754_csr.nan2008) {
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                if (zc == IEEE754_CLASS_INF)
                        return ieee754sp_inf(zs);
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
 
        case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
                SPDNORMX;
-               /* fall through */
-
+               fallthrough;
        case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
                SPDNORMY;
                break;
 
 
        case CPU_VR4133:
                write_c0_config(config & ~VR41_CONF_P4K);
-               /* fall through */
+               fallthrough;
        case CPU_VR4131:
                /* Workaround for cache instruction bug of VR4131 */
                if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||
        case CPU_74K:
        case CPU_1074K:
                has_74k_erratum = alias_74k_erratum(c);
-               /* Fall through. */
+               fallthrough;
        case CPU_M14KC:
        case CPU_M14KEC:
        case CPU_24K:
                        c->dcache.flags |= MIPS_CACHE_PINDEX;
                        break;
                }
-               /* fall through */
+               fallthrough;
        default:
                if (has_74k_erratum || c->dcache.waysize > PAGE_SIZE)
                        c->dcache.flags |= MIPS_CACHE_ALIASES;
 
        case CPU_R5500:
                if (m4kc_tlbp_war())
                        uasm_i_nop(p);
-               /* fall through */
+               fallthrough;
        case CPU_ALCHEMY:
                tlbw(p);
                break;
 
        case 4:
                w_c0_perfctrl3(0);
                w_c0_perfcntr3(reg.counter[3]);
-               /* fall through */
+               fallthrough;
        case 3:
                w_c0_perfctrl2(0);
                w_c0_perfcntr2(reg.counter[2]);
-               /* fall through */
+               fallthrough;
        case 2:
                w_c0_perfctrl1(0);
                w_c0_perfcntr1(reg.counter[1]);
-               /* fall through */
+               fallthrough;
        case 1:
                w_c0_perfctrl0(0);
                w_c0_perfcntr0(reg.counter[0]);
        switch (counters) {
        case 4:
                w_c0_perfctrl3(WHAT | reg.control[3]);
-               /* fall through */
+               fallthrough;
        case 3:
                w_c0_perfctrl2(WHAT | reg.control[2]);
-               /* fall through */
+               fallthrough;
        case 2:
                w_c0_perfctrl1(WHAT | reg.control[1]);
-               /* fall through */
+               fallthrough;
        case 1:
                w_c0_perfctrl0(WHAT | reg.control[0]);
        }
        switch (counters) {
        case 4:
                w_c0_perfctrl3(0);
-               /* fall through */
+               fallthrough;
        case 3:
                w_c0_perfctrl2(0);
-               /* fall through */
+               fallthrough;
        case 2:
                w_c0_perfctrl1(0);
-               /* fall through */
+               fallthrough;
        case 1:
                w_c0_perfctrl0(0);
        }
 
        switch (counters) {
 #define HANDLE_COUNTER(n)                                              \
-       /* fall through */                                              \
+       fallthrough;                                                    \
        case n + 1:                                                     \
                control = r_c0_perfctrl ## n();                         \
                counter = r_c0_perfcntr ## n();                         \
        case 4:
                w_c0_perfctrl3(0);
                w_c0_perfcntr3(0);
-               /* fall through */
+               fallthrough;
        case 3:
                w_c0_perfctrl2(0);
                w_c0_perfcntr2(0);
-               /* fall through */
+               fallthrough;
        case 2:
                w_c0_perfctrl1(0);
                w_c0_perfcntr1(0);
-               /* fall through */
+               fallthrough;
        case 1:
                w_c0_perfctrl0(0);
                w_c0_perfcntr0(0);
 
        case SNI_BRD_PCI_MTOWER:
                if (is_rm300_revd())
                        return irq_tab_rm300d[slot][pin];
-               /* fall through */
-
+               fallthrough;
        case SNI_BRD_PCI_DESKTOP:
                return irq_tab_rm200[slot][pin];
 
 
                if (PCI_SLOT(devfn) == 0)
                        return bcm_pcie_readl(PCIE_DLSTATUS_REG)
                                        & DLSTATUS_PHYLINKUP;
-               /* else, fall through */
+               fallthrough;
        default:
                return false;
        }