drm/i915/tc: Unify the way to get the max lane count value on MTL+

Unify the way to get the max lane count value on all MTL+ platforms,
reducing the code duplication.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250805073700.642107-15-imre.deak@intel.com
Signed-off-by: Imre Deak <imre.deak@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 62d60f02d0c61f207283d0d120370c01bb5e8449..7248d60bbf0b53aaf9f274505866920cdb86dd47 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -322,27 +322,6 @@ get_pin_assignment(struct intel_tc_port *tc)
        return pin_assignment;
 }
 
-static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
-{
-       struct intel_tc_port *tc = to_tc_port(dig_port);
-       enum intel_tc_pin_assignment pin_assignment;
-
-       pin_assignment = get_pin_assignment(tc);
-
-       switch (pin_assignment) {
-       case INTEL_TC_PIN_ASSIGNMENT_NONE:
-               return 0;
-       default:
-               MISSING_CASE(pin_assignment);
-               fallthrough;
-       case INTEL_TC_PIN_ASSIGNMENT_D:
-               return 2;
-       case INTEL_TC_PIN_ASSIGNMENT_C:
-       case INTEL_TC_PIN_ASSIGNMENT_E:
-               return 4;
-       }
-}
-
 static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
 {
        struct intel_tc_port *tc = to_tc_port(dig_port);
@@ -395,9 +374,6 @@ static int get_max_lane_count(struct intel_tc_port *tc)
        if (tc->mode != TC_PORT_DP_ALT)
                return 4;
 
-       if (DISPLAY_VER(display) >= 20)
-               return lnl_tc_port_get_max_lane_count(dig_port);
-
        if (DISPLAY_VER(display) >= 14)
                return mtl_tc_port_get_max_lane_count(dig_port);