openrisc: Fix misalignments in head.S

Align all line continuations and (sub)section headers in a consistent
way.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stafford Horne <shorne@gmail.com>

diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S
index ec6d2a7d5b92803f81c5d3da6ac9d8ed77431a7b..bd760066f1cdc45045a430602c1379856cd71beb 100644 (file)
--- a/arch/openrisc/kernel/head.S
+++ b/arch/openrisc/kernel/head.S
@@ -26,15 +26,15 @@
 #include <asm/asm-offsets.h>
 #include <linux/of_fdt.h>
 
-#define tophys(rd,rs)                          \
-       l.movhi rd,hi(-KERNELBASE)              ;\
+#define tophys(rd,rs)                                          \
+       l.movhi rd,hi(-KERNELBASE)                              ;\
        l.add   rd,rd,rs
 
-#define CLEAR_GPR(gpr)                         \
+#define CLEAR_GPR(gpr)                                         \
        l.movhi gpr,0x0
 
-#define LOAD_SYMBOL_2_GPR(gpr,symbol)          \
-       l.movhi gpr,hi(symbol)                  ;\
+#define LOAD_SYMBOL_2_GPR(gpr,symbol)                          \
+       l.movhi gpr,hi(symbol)                                  ;\
        l.ori   gpr,gpr,lo(symbol)
 
 
@@ -326,21 +326,21 @@
        l.addi  r1,r1,-(INT_FRAME_SIZE)                         ;\
        /* r1 is KSP, r30 is __pa(KSP) */                       ;\
        tophys  (r30,r1)                                        ;\
-       l.sw    PT_GPR12(r30),r12                                       ;\
+       l.sw    PT_GPR12(r30),r12                               ;\
        l.mfspr r12,r0,SPR_EPCR_BASE                            ;\
        l.sw    PT_PC(r30),r12                                  ;\
        l.mfspr r12,r0,SPR_ESR_BASE                             ;\
        l.sw    PT_SR(r30),r12                                  ;\
        /* save r31 */                                          ;\
        EXCEPTION_T_LOAD_GPR30(r12)                             ;\
-       l.sw    PT_GPR30(r30),r12                                       ;\
+       l.sw    PT_GPR30(r30),r12                               ;\
        /* save r10 as was prior to exception */                ;\
        EXCEPTION_T_LOAD_GPR10(r12)                             ;\
-       l.sw    PT_GPR10(r30),r12                                       ;\
-       /* save PT_SP as was prior to exception */                      ;\
+       l.sw    PT_GPR10(r30),r12                               ;\
+       /* save PT_SP as was prior to exception */              ;\
        EXCEPTION_T_LOAD_SP(r12)                                ;\
        l.sw    PT_SP(r30),r12                                  ;\
-       l.sw    PT_GPR13(r30),r13                                       ;\
+       l.sw    PT_GPR13(r30),r13                               ;\
        /* --> */                                               ;\
        /* save exception r4, set r4 = EA */                    ;\
        l.sw    PT_GPR4(r30),r4                                 ;\
@@ -396,7 +396,7 @@ _dispatch_do_ipage_fault:
     .org 0x500
        EXCEPTION_HANDLE(_timer_handler)
 
-/* ---[ 0x600: Alignment exception ]-------------------------------------- */
+/* ---[ 0x600: Alignment exception ]------------------------------------- */
     .org 0x600
        EXCEPTION_HANDLE(_alignment_handler)
 
@@ -426,7 +426,7 @@ _dispatch_do_ipage_fault:
     .org 0xc00
        EXCEPTION_HANDLE(_sys_call_handler)
 
-/* ---[ 0xd00: Floating point exception ]--------------------------------- */
+/* ---[ 0xd00: Floating point exception ]-------------------------------- */
     .org 0xd00
        EXCEPTION_HANDLE(_fpe_trap_handler)
 
@@ -818,7 +818,7 @@ secondary_start:
 
 #endif
 
-/* ========================================[ cache ]=== */
+/* ==========================================================[ cache ]=== */
 
        /* alignment here so we don't change memory offsets with
         * memory controller defined