drm/i915: pass dev_priv explicitly to CHV_CANVAS

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CHV_CANVAS register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a48c7984a14412ef74af250d5bc2ea9097aa2222.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a6d7928fbe370066bdec875fe1c9f4b107f38c0c..241121b0b3ffa42b1acdbe1b92126c23da7d4fbc 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2110,7 +2110,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state,
        if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
                intel_de_write(dev_priv, CHV_BLEND(dev_priv, pipe),
                               CHV_BLEND_LEGACY);
-               intel_de_write(dev_priv, CHV_CANVAS(pipe), 0);
+               intel_de_write(dev_priv, CHV_CANVAS(dev_priv, pipe), 0);
        }
 
        crtc->active = true;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 17422a41a51d611a889b9bd41b0e581948d88dbe..44e3f3bebfeee0d3756900985c4900b80bbdf572 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2191,7 +2191,7 @@
 #define   CHV_CANVAS_BLUE_MASK REG_GENMASK(9, 0)
 
 #define CHV_BLEND(dev_priv, pipe)              _MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A)
-#define CHV_CANVAS(pipe)       _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A)
+#define CHV_CANVAS(dev_priv, pipe)     _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A)
 
 /* Display/Sprite base address macros */
 #define DISP_BASEADDR_MASK     (0xfffff000)