struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        adev->ddev->driver->driver_features |= DRIVER_ATOMIC;
-       amdgpu_dm_set_irq_funcs(adev);
 
        switch (adev->asic_type) {
        case CHIP_BONAIRE:
                return -EINVAL;
        }
 
+       amdgpu_dm_set_irq_funcs(adev);
+
        if (adev->mode_info.funcs == NULL)
                adev->mode_info.funcs = &dm_display_funcs;
 
 
 
 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev)
 {
-       adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+       if (adev->mode_info.num_crtc > 0)
+               adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc;
+       else
+               adev->crtc_irq.num_types = 0;
        adev->crtc_irq.funcs = &dm_crtc_irq_funcs;
 
-       adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;
+       adev->pageflip_irq.num_types = adev->mode_info.num_crtc;
        adev->pageflip_irq.funcs = &dm_pageflip_irq_funcs;
 
-       adev->hpd_irq.num_types = AMDGPU_HPD_LAST;
+       adev->hpd_irq.num_types = adev->mode_info.num_hpd;
        adev->hpd_irq.funcs = &dm_hpd_irq_funcs;
 }