parisc: Enhance detection of synchronous cr16 clocksources

The cr16 clocks of the physical PARISC CPUs are usually nonsynchronous.
Nevertheless, it seems that each CPU socket (which holds two cores) of
PA8800 and PA8900 CPUs (e.g. in a C8000 workstation) is fed by the same
clock source, which makes the cr16 clocks of each CPU socket syncronous.
Let's try to detect such situations and mark the cr16 clocksource stable
on single-socket and single-core machines.

Signed-off-by: Helge Deller <deller@gmx.de>

diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index a3661ee6b060c1d258ab740e5468cfffb665f8d5..ea4e6ae091d051bd629c62c76245af5708b8492c 100644 (file)
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -103,6 +103,8 @@ struct cpuinfo_parisc {
        unsigned long bh_count;     /* number of times bh was invoked */
        unsigned long fp_rev;
        unsigned long fp_model;
+       unsigned long cpu_num;      /* CPU number from PAT firmware */
+       unsigned long cpu_loc;      /* CPU location from PAT firmware */
        unsigned int state;
        struct parisc_device *dev;
        unsigned long loops_per_jiffy;

diff --git a/arch/parisc/kernel/processor.c b/arch/parisc/kernel/processor.c
index 85de47f4eb594564bc9639ff76a099b5ff9aa8c7..0ab32779dfa737d8b2a8ad341ac6e169f0f66a1e 100644 (file)
--- a/arch/parisc/kernel/processor.c
+++ b/arch/parisc/kernel/processor.c
@@ -94,7 +94,7 @@ static int processor_probe(struct parisc_device *dev)
        unsigned long txn_addr;
        unsigned long cpuid;
        struct cpuinfo_parisc *p;
-       struct pdc_pat_cpu_num cpu_info __maybe_unused;
+       struct pdc_pat_cpu_num cpu_info = { };
 
 #ifdef CONFIG_SMP
        if (num_online_cpus() >= nr_cpu_ids) {
@@ -113,6 +113,7 @@ static int processor_probe(struct parisc_device *dev)
         */
        cpuid = boot_cpu_data.cpu_count;
        txn_addr = dev->hpa.start;      /* for legacy PDC */
+       cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
 
 #ifdef CONFIG_64BIT
        if (is_pdc_pat()) {
@@ -180,6 +181,8 @@ static int processor_probe(struct parisc_device *dev)
        p->hpa = dev->hpa.start;        /* save CPU hpa */
        p->cpuid = cpuid;       /* save CPU id */
        p->txn_addr = txn_addr; /* save CPU IRQ address */
+       p->cpu_num = cpu_info.cpu_num;
+       p->cpu_loc = cpu_info.cpu_loc;
 #ifdef CONFIG_SMP
        /*
        ** FIXME: review if any other initialization is clobbered

diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index 89421df70160833a84614c1336fee443ee9b5351..2d956aa0a38abbc3829757bab4749dd6a0037490 100644 (file)
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -243,14 +243,30 @@ void __init time_init(void)
 static int __init init_cr16_clocksource(void)
 {
        /*
-        * The cr16 interval timers are not syncronized across CPUs, so mark
-        * them unstable and lower rating on SMP systems.
+        * The cr16 interval timers are not syncronized across CPUs on
+        * different sockets, so mark them unstable and lower rating on
+        * multi-socket SMP systems.
         */
        if (num_online_cpus() > 1) {
-               clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
-               clocksource_cr16.rating = 0;
+               int cpu;
+               unsigned long cpu0_loc;
+               cpu0_loc = per_cpu(cpu_data, 0).cpu_loc;
+
+               for_each_online_cpu(cpu) {
+                       if (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc)
+                               continue;
+
+                       clocksource_cr16.name = "cr16_unstable";
+                       clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
+                       clocksource_cr16.rating = 0;
+                       break;
+               }
        }
 
+       /* XXX: We may want to mark sched_clock stable here if cr16 clocks are
+        *      in sync:
+        *      (clocksource_cr16.flags == CLOCK_SOURCE_IS_CONTINUOUS) */
+
        /* register at clocksource framework */
        clocksource_register_hz(&clocksource_cr16,
                100 * PAGE0->mem_10msec);