clk: qcom: gcc-sm8150: Add gcc video resets for sm8150

Add gcc video axic, axi0 and axi1 resets for the global clock
controller on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-3-6edb44c83d3b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 80315307dbb4f49362b81b161a173d3545b93cb9..a47ef9dfa8080e06b51309fab45c7b687728fdda 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -3778,6 +3778,9 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = {
        [GCC_USB30_PRIM_BCR] = { 0xf000 },
        [GCC_USB30_SEC_BCR] = { 0x10000 },
        [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
+       [GCC_VIDEO_AXIC_CLK_BCR] = { 0xb02c, 2 },
+       [GCC_VIDEO_AXI0_CLK_BCR] = { 0xb024, 2 },
+       [GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 },
 };
 
 static struct gdsc *gcc_sm8150_gdscs[] = {