{
        u32 flags = 0;
 
-       if (!intel_uc_supports_guc_submission(&guc_to_gt(guc)->uc))
+       if (!intel_guc_is_submission_supported(guc))
                flags |= GUC_CTL_DISABLE_SCHEDULER;
 
        return flags;
 {
        u32 flags = 0;
 
-       if (intel_uc_supports_guc_submission(&guc_to_gt(guc)->uc)) {
+       if (intel_guc_is_submission_supported(guc)) {
                u32 ctxnum, base;
 
                base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
        if (ret)
                goto err_ads;
 
-       if (intel_uc_supports_guc_submission(>->uc)) {
+       if (intel_guc_is_submission_supported(guc)) {
                /*
                 * This is stuff we need to have available at fw load time
                 * if we are planning to enable submission later
 
        i915_ggtt_disable_guc(gt->ggtt);
 
-       if (intel_uc_supports_guc_submission(>->uc))
+       if (intel_guc_is_submission_supported(guc))
                intel_guc_submission_fini(guc);
 
        intel_guc_ct_fini(&guc->ct);