arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml

The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 3f6b1715835af06d768baf2f837be5ac126b5c0f..edb80abf45b327b9cabde8836784514eba10182e 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -971,8 +971,8 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>;
-                       clock-names = "apb_pclk";
+                       clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>, <&crg_ctrl HI3660_CLK_GATE_SPI2>;
+                       clock-names = "sspclk", "apb_pclk";
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi2_pmx_func &spi2_cfg_func>;
                        num-cs = <1>;
@@ -986,8 +986,8 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>;
-                       clock-names = "apb_pclk";
+                       clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>, <&crg_ctrl HI3660_CLK_GATE_SPI3>;
+                       clock-names = "sspclk", "apb_pclk";
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi3_pmx_func &spi3_cfg_func>;
                        num-cs = <1>;

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 11a72891e2a3a656f2a38fccab04a51857bdea79..1c7dda972c928561261c91fe154a27190aafb9f1 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -291,8 +291,8 @@
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        num-cs = <1>;
                        cs-gpios = <&gpio7 1 0>;
-                       clocks = <&crg HISTB_SPI0_CLK>;
-                       clock-names = "apb_pclk";
+                       clocks = <&crg HISTB_SPI0_CLK>, <&crg HISTB_SPI0_CLK>;
+                       clock-names = "sspclk", "apb_pclk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 014735a9bc7312d35b4d8303ea70d369ae4140a9..c6580c9f068ebf74d74975125ec67162aab2ef24 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -725,8 +725,8 @@
                        interrupts = <0 50 4>;
                        bus-id = <0>;
                        enable-dma = <0>;
-                       clocks = <&sys_ctrl HI6220_SPI_CLK>;
-                       clock-names = "apb_pclk";
+                       clocks = <&sys_ctrl HI6220_SPI_CLK>, <&sys_ctrl HI6220_SPI_CLK>;
+                       clock-names = "sspclk", "apb_pclk";
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
                        num-cs = <1>;