drm/amd/amdgpu: post card if there is real hw resetting performed

Check whether we need to post rather than whether the asic is
posted.  There are some cases (e.g., GPU reset or resume from
hibernate) where we need to force post even if the asic has
been posted.

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e9af03113fc3667b2513ea9fe20dcfc55af63a78..c1b9135417396c2296d8cddee3bd799b70f457ff 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1482,6 +1482,9 @@ struct amdgpu_device {
        spinlock_t                      gtt_list_lock;
        struct list_head                gtt_list;
 
+       /* record hw reset is performed */
+       bool has_hw_reset;
+
 };
 
 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
@@ -1700,7 +1703,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 int amdgpu_gpu_reset(struct amdgpu_device *adev);
 bool amdgpu_need_backup(struct amdgpu_device *adev);
 void amdgpu_pci_config_reset(struct amdgpu_device *adev);
-bool amdgpu_card_posted(struct amdgpu_device *adev);
+bool amdgpu_need_post(struct amdgpu_device *adev);
 void amdgpu_update_display_priority(struct amdgpu_device *adev);
 
 int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
index d9def01f276e797df5e6af1d321a886f502478b3..821f7cc2051fd347cdcd1b4e0c59a164baf491c3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
@@ -100,7 +100,7 @@ static bool igp_read_bios_from_vram(struct amdgpu_device *adev)
        resource_size_t size = 256 * 1024; /* ??? */
 
        if (!(adev->flags & AMD_IS_APU))
-               if (!amdgpu_card_posted(adev))
+               if (amdgpu_need_post(adev))
                        return false;
 
        adev->bios = NULL;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 944ba0d3874a271df069610ccf70414b45c182e1..6abb238b25c97e8acc9f76887fa4b042e6025c1c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -619,25 +619,29 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
  * GPU helpers function.
  */
 /**
- * amdgpu_card_posted - check if the hw has already been initialized
+ * amdgpu_need_post - check if the hw need post or not
  *
  * @adev: amdgpu_device pointer
  *
- * Check if the asic has been initialized (all asics).
- * Used at driver startup.
- * Returns true if initialized or false if not.
+ * Check if the asic has been initialized (all asics) at driver startup
+ * or post is needed if  hw reset is performed.
+ * Returns true if need or false if not.
  */
-bool amdgpu_card_posted(struct amdgpu_device *adev)
+bool amdgpu_need_post(struct amdgpu_device *adev)
 {
        uint32_t reg;
 
+       if (adev->has_hw_reset) {
+               adev->has_hw_reset = false;
+               return true;
+       }
        /* then check MEM_SIZE, in case the crtcs are off */
        reg = RREG32(mmCONFIG_MEMSIZE);
 
        if (reg)
-               return true;
+               return false;
 
-       return false;
+       return true;
 
 }
 
@@ -665,7 +669,7 @@ static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
                                return true;
                }
        }
-       return !amdgpu_card_posted(adev);
+       return amdgpu_need_post(adev);
 }
 
 /**
@@ -2071,7 +2075,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
        amdgpu_atombios_scratch_regs_restore(adev);
 
        /* post card */
-       if (!amdgpu_card_posted(adev) || !resume) {
+       if (amdgpu_need_post(adev)) {
                r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
                if (r)
                        DRM_ERROR("amdgpu asic init failed\n");

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 7c39b538dc0e4ca49b9fe72b1b820cfe50b777e7..c4d4b35e54ec002bad0990100e93f0749d6c4d90 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1176,6 +1176,7 @@ static int cik_gpu_pci_config_reset(struct amdgpu_device *adev)
                if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) {
                        /* enable BM */
                        pci_set_master(adev->pdev);
+                       adev->has_hw_reset = true;
                        r = 0;
                        break;
                }

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 4922fff08c3c7fab001c7b237dcdcc28d8b23ae9..50bdb24ef8d6e9f7e828ea661d873659beb3ce42 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -721,6 +721,7 @@ static int vi_gpu_pci_config_reset(struct amdgpu_device *adev)
                if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) {
                        /* enable BM */
                        pci_set_master(adev->pdev);
+                       adev->has_hw_reset = true;
                        return 0;
                }
                udelay(1);