dt-bindings: net: dsa: lantiq,gswip: convert to YAML schema

Convert the lantiq,gswip bindings to YAML format.

Also add this new file to the MAINTAINERS file.

Furthermore, the CPU port has to specify a phy-mode and either a phy or
a fixed-link. Since GSWIP is connected using a SoC internal protocol
there's no PHY involved. Add phy-mode = "internal" and a fixed-link to
the example code to describe the communication between the PMAC
(Ethernet controller) and GSWIP switch.

Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20240611135434.3180973-2-ms@dev.tdt.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
new file mode 100644 (file)
index 0000000..f3154b1
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
@@ -0,0 +1,202 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq GSWIP Ethernet switches
+
+allOf:
+  - $ref: dsa.yaml#/$defs/ethernet-ports
+
+maintainers:
+  - Hauke Mehrtens <hauke@hauke-m.de>
+
+properties:
+  compatible:
+    enum:
+      - lantiq,xrx200-gswip
+      - lantiq,xrx300-gswip
+      - lantiq,xrx330-gswip
+
+  reg:
+    minItems: 3
+    maxItems: 3
+
+  reg-names:
+    items:
+      - const: switch
+      - const: mdio
+      - const: mii
+
+  mdio:
+    $ref: /schemas/net/mdio.yaml#
+    unevaluatedProperties: false
+
+    properties:
+      compatible:
+        const: lantiq,xrx200-mdio
+
+    required:
+      - compatible
+
+  gphy-fw:
+    type: object
+    properties:
+      '#address-cells':
+        const: 1
+
+      '#size-cells':
+        const: 0
+
+      compatible:
+        items:
+          - enum:
+              - lantiq,xrx200-gphy-fw
+              - lantiq,xrx300-gphy-fw
+              - lantiq,xrx330-gphy-fw
+          - const: lantiq,gphy-fw
+
+      lantiq,rcu:
+        $ref: /schemas/types.yaml#/definitions/phandle
+        description: phandle to the RCU syscon
+
+    patternProperties:
+      "^gphy@[0-9a-f]{1,2}$":
+        type: object
+
+        additionalProperties: false
+
+        properties:
+          reg:
+            minimum: 0
+            maximum: 255
+            description:
+              Offset of the GPHY firmware register in the RCU register range
+
+          resets:
+            items:
+              - description: GPHY reset line
+
+          reset-names:
+            items:
+              - const: gphy
+
+        required:
+          - reg
+
+    required:
+      - compatible
+      - lantiq,rcu
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    switch@e108000 {
+            compatible = "lantiq,xrx200-gswip";
+            reg = <0xe108000 0x3100>,  /* switch */
+                  <0xe10b100 0xd8>,    /* mdio */
+                  <0xe10b1d8 0x130>;   /* mii */
+            dsa,member = <0 0>;
+
+            ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+
+                    port@0 {
+                            reg = <0>;
+                            label = "lan3";
+                            phy-mode = "rgmii";
+                            phy-handle = <&phy0>;
+                    };
+
+                    port@1 {
+                            reg = <1>;
+                            label = "lan4";
+                            phy-mode = "rgmii";
+                            phy-handle = <&phy1>;
+                    };
+
+                    port@2 {
+                            reg = <2>;
+                            label = "lan2";
+                            phy-mode = "internal";
+                            phy-handle = <&phy11>;
+                    };
+
+                    port@4 {
+                            reg = <4>;
+                            label = "lan1";
+                            phy-mode = "internal";
+                            phy-handle = <&phy13>;
+                    };
+
+                    port@5 {
+                            reg = <5>;
+                            label = "wan";
+                            phy-mode = "rgmii";
+                            phy-handle = <&phy5>;
+                    };
+
+                    port@6 {
+                            reg = <0x6>;
+                            phy-mode = "internal";
+                            ethernet = <&eth0>;
+
+                            fixed-link {
+                                    speed = <1000>;
+                                    full-duplex;
+                            };
+                    };
+            };
+
+            mdio {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    compatible = "lantiq,xrx200-mdio";
+
+                    phy0: ethernet-phy@0 {
+                            reg = <0x0>;
+                    };
+                    phy1: ethernet-phy@1 {
+                            reg = <0x1>;
+                    };
+                    phy5: ethernet-phy@5 {
+                            reg = <0x5>;
+                    };
+                    phy11: ethernet-phy@11 {
+                            reg = <0x11>;
+                    };
+                    phy13: ethernet-phy@13 {
+                            reg = <0x13>;
+                    };
+            };
+
+            gphy-fw {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
+                    lantiq,rcu = <&rcu0>;
+
+                    gphy@20 {
+                            reg = <0x20>;
+
+                            resets = <&reset0 31 30>;
+                            reset-names = "gphy";
+                    };
+
+                    gphy@68 {
+                            reg = <0x68>;
+
+                            resets = <&reset0 29 28>;
+                            reset-names = "gphy";
+                    };
+            };
+    };

diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
deleted file mode 100644 (file)
index 8bb1eff..0000000
--- a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
+++ /dev/null
@@ -1,146 +0,0 @@
-Lantiq GSWIP Ethernet switches
-==================================
-
-Required properties for GSWIP core:
-
-- compatible   : "lantiq,xrx200-gswip" for the embedded GSWIP in the
-                 xRX200 SoC
-                 "lantiq,xrx300-gswip" for the embedded GSWIP in the
-                 xRX300 SoC
-                 "lantiq,xrx330-gswip" for the embedded GSWIP in the
-                 xRX330 SoC
-- reg          : memory range of the GSWIP core registers
-               : memory range of the GSWIP MDIO registers
-               : memory range of the GSWIP MII registers
-
-See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of
-additional required and optional properties.
-
-
-Required properties for MDIO bus:
-- compatible   : "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP
-                 core of the xRX200 SoC and the PHYs connected to it.
-
-See Documentation/devicetree/bindings/net/mdio.txt for a list of additional
-required and optional properties.
-
-
-Required properties for GPHY firmware loading:
-- compatible   : "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
-                 "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw"
-                 "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw"
-                 for the loading of the firmware into the embedded
-                 GPHY core of the SoC.
-- lantiq,rcu   : reference to the rcu syscon
-
-The GPHY firmware loader has a list of GPHY entries, one for each
-embedded GPHY
-
-- reg          : Offset of the GPHY firmware register in the RCU
-                 register range
-- resets       : list of resets of the embedded GPHY
-- reset-names  : list of names of the resets
-
-Example:
-
-Ethernet switch on the VRX200 SoC:
-
-switch@e108000 {
-       #address-cells = <1>;
-       #size-cells = <0>;
-       compatible = "lantiq,xrx200-gswip";
-       reg = < 0xe108000 0x3100        /* switch */
-               0xe10b100 0xd8          /* mdio */
-               0xe10b1d8 0x130         /* mii */
-               >;
-       dsa,member = <0 0>;
-
-       ports {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               port@0 {
-                       reg = <0>;
-                       label = "lan3";
-                       phy-mode = "rgmii";
-                       phy-handle = <&phy0>;
-               };
-
-               port@1 {
-                       reg = <1>;
-                       label = "lan4";
-                       phy-mode = "rgmii";
-                       phy-handle = <&phy1>;
-               };
-
-               port@2 {
-                       reg = <2>;
-                       label = "lan2";
-                       phy-mode = "internal";
-                       phy-handle = <&phy11>;
-               };
-
-               port@4 {
-                       reg = <4>;
-                       label = "lan1";
-                       phy-mode = "internal";
-                       phy-handle = <&phy13>;
-               };
-
-               port@5 {
-                       reg = <5>;
-                       label = "wan";
-                       phy-mode = "rgmii";
-                       phy-handle = <&phy5>;
-               };
-
-               port@6 {
-                       reg = <0x6>;
-                       ethernet = <&eth0>;
-               };
-       };
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "lantiq,xrx200-mdio";
-               reg = <0>;
-
-               phy0: ethernet-phy@0 {
-                       reg = <0x0>;
-               };
-               phy1: ethernet-phy@1 {
-                       reg = <0x1>;
-               };
-               phy5: ethernet-phy@5 {
-                       reg = <0x5>;
-               };
-               phy11: ethernet-phy@11 {
-                       reg = <0x11>;
-               };
-               phy13: ethernet-phy@13 {
-                       reg = <0x13>;
-               };
-       };
-
-       gphy-fw {
-               compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
-               lantiq,rcu = <&rcu0>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               gphy@20 {
-                       reg = <0x20>;
-
-                       resets = <&reset0 31 30>;
-                       reset-names = "gphy";
-               };
-
-               gphy@68 {
-                       reg = <0x68>;
-
-                       resets = <&reset0 29 28>;
-                       reset-names = "gphy";
-               };
-       };
-};

diff --git a/MAINTAINERS b/MAINTAINERS
index 5de76400d7fd4f70cfec9debb50d112fc7ab3d87..e66b7d4324ae8e9de8b5eb50f0a69aef7408d8ed 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12449,6 +12449,7 @@ LANTIQ / INTEL Ethernet drivers
 M:     Hauke Mehrtens <hauke@hauke-m.de>
 L:     netdev@vger.kernel.org
 S:     Maintained
+F:     Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
 F:     drivers/net/dsa/lantiq_gswip.c
 F:     drivers/net/dsa/lantiq_pce.h
 F:     drivers/net/ethernet/lantiq_xrx200.c