drm/amdgpu:cleanup GMC & gart garbage function

for gart_ram_alloc/free, they are never used in driver thus
ripe them out totally.

for gart_vram_pin/unpin, they are not needed becuase we can
use bo_creat_kernel/free to replace the original manual way
in the gart_vram_alloc/free, thus gart_vram_pin/unpin can
also be riped out.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index fe818501c520ba4dc332314ef848b7e48a4a2e32..10eeb307700c77ed604e8d028b7a304e279f2148 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -56,63 +56,6 @@
  * Common GART table functions.
  */
 
-/**
- * amdgpu_gart_table_ram_alloc - allocate system ram for gart page table
- *
- * @adev: amdgpu_device pointer
- *
- * Allocate system memory for GART page table
- * (r1xx-r3xx, non-pcie r4xx, rs400).  These asics require the
- * gart table to be in system memory.
- * Returns 0 for success, -ENOMEM for failure.
- */
-int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev)
-{
-       void *ptr;
-
-       ptr = pci_alloc_consistent(adev->pdev, adev->gart.table_size,
-                                  &adev->gart.table_addr);
-       if (ptr == NULL) {
-               return -ENOMEM;
-       }
-#ifdef CONFIG_X86
-       if (0) {
-               set_memory_uc((unsigned long)ptr,
-                             adev->gart.table_size >> PAGE_SHIFT);
-       }
-#endif
-       adev->gart.ptr = ptr;
-       memset((void *)adev->gart.ptr, 0, adev->gart.table_size);
-       return 0;
-}
-
-/**
- * amdgpu_gart_table_ram_free - free system ram for gart page table
- *
- * @adev: amdgpu_device pointer
- *
- * Free system memory for GART page table
- * (r1xx-r3xx, non-pcie r4xx, rs400).  These asics require the
- * gart table to be in system memory.
- */
-void amdgpu_gart_table_ram_free(struct amdgpu_device *adev)
-{
-       if (adev->gart.ptr == NULL) {
-               return;
-       }
-#ifdef CONFIG_X86
-       if (0) {
-               set_memory_wb((unsigned long)adev->gart.ptr,
-                             adev->gart.table_size >> PAGE_SHIFT);
-       }
-#endif
-       pci_free_consistent(adev->pdev, adev->gart.table_size,
-                           (void *)adev->gart.ptr,
-                           adev->gart.table_addr);
-       adev->gart.ptr = NULL;
-       adev->gart.table_addr = 0;
-}
-
 /**
  * amdgpu_gart_table_vram_alloc - allocate vram for gart page table
  *
@@ -125,75 +68,9 @@ void amdgpu_gart_table_ram_free(struct amdgpu_device *adev)
  */
 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
 {
-       int r;
-
-       if (adev->gart.robj == NULL) {
-               r = amdgpu_bo_create(adev, adev->gart.table_size,
-                                    PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
-                                    AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-                                    AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
-                                    NULL, NULL, 0, &adev->gart.robj);
-               if (r) {
-                       return r;
-               }
-       }
-       return 0;
-}
-
-/**
- * amdgpu_gart_table_vram_pin - pin gart page table in vram
- *
- * @adev: amdgpu_device pointer
- *
- * Pin the GART page table in vram so it will not be moved
- * by the memory manager (pcie r4xx, r5xx+).  These asics require the
- * gart table to be in video memory.
- * Returns 0 for success, error for failure.
- */
-int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev)
-{
-       uint64_t gpu_addr;
-       int r;
-
-       r = amdgpu_bo_reserve(adev->gart.robj, false);
-       if (unlikely(r != 0))
-               return r;
-       r = amdgpu_bo_pin(adev->gart.robj,
-                               AMDGPU_GEM_DOMAIN_VRAM, &gpu_addr);
-       if (r) {
-               amdgpu_bo_unreserve(adev->gart.robj);
-               return r;
-       }
-       r = amdgpu_bo_kmap(adev->gart.robj, &adev->gart.ptr);
-       if (r)
-               amdgpu_bo_unpin(adev->gart.robj);
-       amdgpu_bo_unreserve(adev->gart.robj);
-       adev->gart.table_addr = gpu_addr;
-       return r;
-}
-
-/**
- * amdgpu_gart_table_vram_unpin - unpin gart page table in vram
- *
- * @adev: amdgpu_device pointer
- *
- * Unpin the GART page table in vram (pcie r4xx, r5xx+).
- * These asics require the gart table to be in video memory.
- */
-void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev)
-{
-       int r;
-
-       if (adev->gart.robj == NULL) {
-               return;
-       }
-       r = amdgpu_bo_reserve(adev->gart.robj, true);
-       if (likely(r == 0)) {
-               amdgpu_bo_kunmap(adev->gart.robj);
-               amdgpu_bo_unpin(adev->gart.robj);
-               amdgpu_bo_unreserve(adev->gart.robj);
-               adev->gart.ptr = NULL;
-       }
+       return amdgpu_bo_create_kernel(adev, adev->gart.table_size, PAGE_SIZE,
+                                       AMDGPU_GEM_DOMAIN_VRAM, &adev->gart.robj,
+                                       &adev->gart.table_addr, &adev->gart.ptr);
 }
 
 /**
@@ -207,10 +84,9 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev)
  */
 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev)
 {
-       if (adev->gart.robj == NULL) {
-               return;
-       }
-       amdgpu_bo_unref(&adev->gart.robj);
+       amdgpu_bo_free_kernel(&adev->gart.robj,
+                               &adev->gart.table_addr,
+                               &adev->gart.ptr);
 }
 
 /*

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
index afbe803b1a13a93bce4d342d4c7f6bccce03c3aa..f15e319580ec58e942c471aa824fb7f47bd59893 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
@@ -56,12 +56,8 @@ struct amdgpu_gart {
        const struct amdgpu_gart_funcs *gart_funcs;
 };
 
-int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
-void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
-int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
-void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
 int amdgpu_gart_init(struct amdgpu_device *adev);
 void amdgpu_gart_fini(struct amdgpu_device *adev);
 int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index f34adb0cd1eadc053dec9f169c218225c5f5a18c..d49c768cf3dce16a5e1c648ee08c5fb6d1413922 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1397,8 +1397,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 
 void amdgpu_ttm_fini(struct amdgpu_device *adev)
 {
-       int r;
-
        if (!adev->mman.initialized)
                return;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index c8e47c36608e4da4dabd31ad1f56a69d4c781b78..f3e5c9c6a52d1f050a54ce6a0c27bf2b61e59a47 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -483,16 +483,14 @@ static void gmc_v6_0_set_prt(struct amdgpu_device *adev, bool enable)
 
 static int gmc_v6_0_gart_enable(struct amdgpu_device *adev)
 {
-       int r, i;
+       int i;
        u32 field;
 
        if (adev->gart.robj == NULL) {
                dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
                return -EINVAL;
        }
-       r = amdgpu_gart_table_vram_pin(adev);
-       if (r)
-               return r;
+
        /* Setup TLB control */
        WREG32(mmMC_VM_MX_L1_TLB_CNTL,
               (0xA << 7) |
@@ -619,7 +617,6 @@ static void gmc_v6_0_gart_disable(struct amdgpu_device *adev)
        WREG32(mmVM_L2_CNTL3,
               VM_L2_CNTL3__L2_CACHE_BIGK_ASSOCIATIVITY_MASK |
               (0UL << VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT));
-       amdgpu_gart_table_vram_unpin(adev);
 }
 
 static void gmc_v6_0_gart_fini(struct amdgpu_device *adev)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 2b7338e2240953d9701da491883f5f9f1bd80ebb..6d153fa8175cd252cc49f7759768c21ca37c048d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -588,16 +588,14 @@ static void gmc_v7_0_set_prt(struct amdgpu_device *adev, bool enable)
  */
 static int gmc_v7_0_gart_enable(struct amdgpu_device *adev)
 {
-       int r, i;
+       int i;
        u32 tmp, field;
 
        if (adev->gart.robj == NULL) {
                dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
                return -EINVAL;
        }
-       r = amdgpu_gart_table_vram_pin(adev);
-       if (r)
-               return r;
+
        /* Setup TLB control */
        tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);
        tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1);
@@ -730,7 +728,6 @@ static void gmc_v7_0_gart_disable(struct amdgpu_device *adev)
        tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
        WREG32(mmVM_L2_CNTL, tmp);
        WREG32(mmVM_L2_CNTL2, 0);
-       amdgpu_gart_table_vram_unpin(adev);
 }
 
 /**

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index e30a96a8f49b94ef652a372d4d5d1d39dd4a7cda..7ee5f21295d4f563b337111fc21ce081468ff32d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -787,16 +787,14 @@ static void gmc_v8_0_set_prt(struct amdgpu_device *adev, bool enable)
  */
 static int gmc_v8_0_gart_enable(struct amdgpu_device *adev)
 {
-       int r, i;
+       int i;
        u32 tmp, field;
 
        if (adev->gart.robj == NULL) {
                dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
                return -EINVAL;
        }
-       r = amdgpu_gart_table_vram_pin(adev);
-       if (r)
-               return r;
+
        /* Setup TLB control */
        tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);
        tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1);
@@ -946,7 +944,6 @@ static void gmc_v8_0_gart_disable(struct amdgpu_device *adev)
        tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
        WREG32(mmVM_L2_CNTL, tmp);
        WREG32(mmVM_L2_CNTL2, 0);
-       amdgpu_gart_table_vram_unpin(adev);
 }
 
 /**

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index d9a91098bcb162121cceab239fa9849e6f7a7cd8..4960805bf9899c4d0e332ef4d9b69c7768a05468 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -869,7 +869,7 @@ static int gmc_v9_0_sw_init(void *handle)
 }
 
 /**
- * gmc_v8_0_gart_fini - vm fini callback
+ * gmc_v9_0_gart_fini - vm fini callback
  *
  * @adev: amdgpu_device pointer
  *
@@ -933,9 +933,6 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
                dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
                return -EINVAL;
        }
-       r = amdgpu_gart_table_vram_pin(adev);
-       if (r)
-               return r;
 
        switch (adev->asic_type) {
        case CHIP_RAVEN:
@@ -1013,7 +1010,6 @@ static void gmc_v9_0_gart_disable(struct amdgpu_device *adev)
 {
        gfxhub_v1_0_gart_disable(adev);
        mmhub_v1_0_gart_disable(adev);
-       amdgpu_gart_table_vram_unpin(adev);
 }
 
 static int gmc_v9_0_hw_fini(void *handle)