drm/i915: Constify the snps/c10x PLL state checkers

State checkers should never modify the crtc states, so make
them const.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index abd607b564f124a8fb05874b8cd2c6f73e060bd8..1aba265afe412363eb87aafbe91c2d9606ccad8f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -3005,11 +3005,11 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder,
 }
 
 void intel_c10pll_state_verify(struct intel_atomic_state *state,
-                              struct intel_crtc_state *new_crtc_state)
+                              const struct intel_crtc_state *new_crtc_state)
 {
        struct drm_i915_private *i915 = to_i915(state->base.dev);
        struct intel_c10pll_state mpllb_hw_state = { 0 };
-       struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
+       const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
        struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
        struct intel_encoder *encoder;
        enum phy phy;

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
index 912e0eeb0be38b87aaeb77945d71bf116f4c540a..43f2fdb662c5d7155c8e9611d21245b4a371facf 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
@@ -34,7 +34,7 @@ void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv,
 int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
                                 const struct intel_c10pll_state *pll_state);
 void intel_c10pll_state_verify(struct intel_atomic_state *state,
-                              struct intel_crtc_state *new_crtc_state);
+                              const struct intel_crtc_state *new_crtc_state);
 void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
                                   struct intel_c20pll_state *pll_state);
 void intel_c20pll_dump_hw_state(struct drm_i915_private *i915,

diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index 88ef56b6e0fd0b7e9d37b672c271a80914c6a03b..bdceb6bd474c0bfa0cde7c4d275f3bedf4370332 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -1993,11 +1993,11 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
 }
 
 void intel_mpllb_state_verify(struct intel_atomic_state *state,
-                             struct intel_crtc_state *new_crtc_state)
+                             const struct intel_crtc_state *new_crtc_state)
 {
        struct drm_i915_private *i915 = to_i915(state->base.dev);
        struct intel_mpllb_state mpllb_hw_state = { 0 };
-       struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
+       const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
        struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
        struct intel_encoder *encoder;
 

diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h
index 557ef820bc0b39602085f54bcd4f53b4b17baf2e..9d1d0c6a9cfef9c5c7ea32f662afa880bb4d7fe8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h
@@ -33,6 +33,6 @@ int intel_snps_phy_check_hdmi_link_rate(int clock);
 void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
                                      const struct intel_crtc_state *crtc_state);
 void intel_mpllb_state_verify(struct intel_atomic_state *state,
-                             struct intel_crtc_state *new_crtc_state);
+                             const struct intel_crtc_state *new_crtc_state);
 
 #endif /* __INTEL_SNPS_PHY_H__ */