IWL_DEVICE_FAMILY_8000,
 };
 
+static inline bool iwl_has_secure_boot(u32 hw_rev,
+                                      enum iwl_device_family family)
+{
+       /* return 1 only for family 8000 B0 */
+       if ((family == IWL_DEVICE_FAMILY_8000) && (hw_rev & 0xC))
+               return 1;
+
+       return 0;
+}
+
 /*
  * LED mode
  *    IWL_LED_DEFAULT:  use device default
 
                        iwl_store_ucode_sec(pieces, tlv_data, IWL_UCODE_REGULAR,
                                            tlv_len);
                        drv->fw.mvm_fw = true;
-                       drv->fw.img[IWL_UCODE_REGULAR].is_secure = true;
                        break;
                case IWL_UCODE_TLV_SECURE_SEC_INIT:
                        iwl_store_ucode_sec(pieces, tlv_data, IWL_UCODE_INIT,
                                            tlv_len);
                        drv->fw.mvm_fw = true;
-                       drv->fw.img[IWL_UCODE_INIT].is_secure = true;
                        break;
                case IWL_UCODE_TLV_SECURE_SEC_WOWLAN:
                        iwl_store_ucode_sec(pieces, tlv_data, IWL_UCODE_WOWLAN,
                                            tlv_len);
                        drv->fw.mvm_fw = true;
-                       drv->fw.img[IWL_UCODE_WOWLAN].is_secure = true;
                        break;
                case IWL_UCODE_TLV_NUM_OF_CPU:
                        if (tlv_len != sizeof(u32))
 
        int ret = 0;
        int first_ucode_section;
 
-       IWL_DEBUG_FW(trans,
-                    "working with %s image\n",
-                    image->is_secure ? "Secured" : "Non Secured");
        IWL_DEBUG_FW(trans,
                     "working with %s CPU\n",
                     image->is_dual_cpus ? "Dual" : "Single");
 
        /* configure the ucode to be ready to get the secured image */
-       if (image->is_secure) {
+       if (iwl_has_secure_boot(trans->hw_rev, trans->cfg->device_family)) {
                /* set secure boot inspector addresses */
                iwl_write_prph(trans,
                               LMPM_SECURE_INSPECTOR_CODE_ADDR,
                               LMPM_SECURE_CPU2_HDR_MEM_SPACE);
 
                /* load to FW the binary sections of CPU2 */
-               if (image->is_secure)
+               if (iwl_has_secure_boot(trans->hw_rev,
+                                       trans->cfg->device_family))
                        ret = iwl_pcie_load_cpu_secured_sections(
                                                        trans, image, 2,
                                                        &first_ucode_section);
        else
                iwl_write32(trans, CSR_RESET, 0);
 
-       if (image->is_secure) {
+       if (iwl_has_secure_boot(trans->hw_rev, trans->cfg->device_family)) {
                /* wait for image verification to complete  */
                ret = iwl_poll_prph_bit(trans,
                                        LMPM_SECURE_BOOT_CPU1_STATUS_ADDR,