MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
 
-static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
-{
-       writel(value, reg);
-       if (flush)
-               mb();
-}
-
-static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
-                                   u32 value, void __iomem *regh, u32 paddrh,
-                                   bool flush)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&adapter->bit64reglock, flags);
-       writel(paddrh, regh);
-       writel(value, reg);
-       if (flush)
-               mb();
-       spin_unlock_irqrestore(&adapter->bit64reglock, flags);
-}
-
 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
 {
        unsigned char crcpoly;
 
 static void slic_mcast_set_mask(struct adapter *adapter)
 {
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
-
        if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
                /*
                 * Turn on all multicast addresses. We have to do this for
                 * Microcode from having to keep state about the MAC
                 * configuration.
                 */
-               slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
-               slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
-                                FLUSH);
+               slic_write32(adapter, SLIC_REG_MCASTLOW, 0xFFFFFFFF);
+               slic_write32(adapter, SLIC_REG_MCASTHIGH, 0xFFFFFFFF);
        } else {
                /*
                 * Commit our multicast mast to the SLIC by writing to the
                 * multicast address mask registers
                 */
-               slic_reg32_write(&slic_regs->slic_mcastlow,
-                       (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
-               slic_reg32_write(&slic_regs->slic_mcasthigh,
-                       (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
+               slic_write32(adapter, SLIC_REG_MCASTLOW,
+                            (u32)(adapter->mcastmask & 0xFFFFFFFF));
+               slic_write32(adapter, SLIC_REG_MCASTHIGH,
+                            (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF));
        }
 }
 
        add_timer(&adapter->pingtimer);
 }
 
-static void slic_unmap_mmio_space(struct adapter *adapter)
-{
-       if (adapter->slic_regs)
-               iounmap(adapter->slic_regs);
-       adapter->slic_regs = NULL;
-}
-
 /*
  *  slic_link_config
  *
 static void slic_link_config(struct adapter *adapter,
                      u32 linkspeed, u32 linkduplex)
 {
-       u32 __iomem *wphy;
        u32 speed;
        u32 duplex;
        u32 phy_config;
        if (linkduplex > LINK_AUTOD)
                linkduplex = LINK_AUTOD;
 
-       wphy = &adapter->slic_regs->slic_wphy;
-
        if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
                if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
                        /*
                        phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
                        /* enable PAUSE frames        */
                        phy_advreg |= PAR_ASYMPAUSE_FIBER;
-                       slic_reg32_write(wphy, phy_advreg, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WPHY, phy_advreg);
 
                        if (linkspeed == LINK_AUTOSPEED) {
                                /* reset phy, enable auto-neg  */
                                    (MIICR_REG_PCR |
                                     (PCR_RESET | PCR_AUTONEG |
                                      PCR_AUTONEG_RST));
-                               slic_reg32_write(wphy, phy_config, FLUSH);
+                               slic_write32(adapter, SLIC_REG_WPHY,
+                                            phy_config);
                        } else {        /* forced 1000 Mb FD*/
                                /*
                                 * power down phy to break link
                                 * this may not work)
                                 */
                                phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
-                               slic_reg32_write(wphy, phy_config, FLUSH);
+                               slic_write32(adapter, SLIC_REG_WPHY,
+                                            phy_config);
                                slic_flush_write(adapter);
                                /*
                                 * wait, Marvell says 1 sec,
                                    (MIICR_REG_PCR |
                                     (PCR_RESET | PCR_SPEED_1000 |
                                      PCR_DUPLEX_FULL));
-                               slic_reg32_write(wphy, phy_config, FLUSH);
+                               slic_write32(adapter, SLIC_REG_WPHY,
+                                            phy_config);
                        }
                } else {        /* copper gigabit */
 
                        phy_advreg |= PAR_ASYMPAUSE;
                        /* required by the Cicada PHY  */
                        phy_advreg |= PAR_802_3;
-                       slic_reg32_write(wphy, phy_advreg, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WPHY, phy_advreg);
                        /* advertise FD only @1000 Mb  */
                        phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
-                       slic_reg32_write(wphy, phy_gctlreg, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WPHY, phy_gctlreg);
 
                        if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
                                /*
                                 */
                                phy_config =
                                    (MIICR_REG_16 | (MRV_REG16_XOVERON));
-                               slic_reg32_write(wphy, phy_config, FLUSH);
+                               slic_write32(adapter, SLIC_REG_WPHY,
+                                            phy_config);
 
                                /* reset phy, enable auto-neg  */
                                phy_config =
                                    (MIICR_REG_PCR |
                                     (PCR_RESET | PCR_AUTONEG |
                                      PCR_AUTONEG_RST));
-                               slic_reg32_write(wphy, phy_config, FLUSH);
+                               slic_write32(adapter, SLIC_REG_WPHY,
+                                            phy_config);
                        } else {        /* it's a Cicada PHY  */
                                /* enable and restart auto-neg (don't reset)  */
                                phy_config =
                                    (MIICR_REG_PCR |
                                     (PCR_AUTONEG | PCR_AUTONEG_RST));
-                               slic_reg32_write(wphy, phy_config, FLUSH);
+                               slic_write32(adapter, SLIC_REG_WPHY,
+                                            phy_config);
                        }
                }
        } else {
                         * disable auto crossover
                         */
                        phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
-                       slic_reg32_write(wphy, phy_config, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WPHY, phy_config);
                }
 
                /* power down phy to break link (this may not work)  */
                phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
-               slic_reg32_write(wphy, phy_config, FLUSH);
+               slic_write32(adapter, SLIC_REG_WPHY, phy_config);
                slic_flush_write(adapter);
                /* wait, Marvell says 1 sec, try to get away with 10 ms */
                mdelay(10);
                         */
                        phy_config =
                            (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
-                       slic_reg32_write(wphy, phy_config, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WPHY, phy_config);
                } else {        /* it's a Cicada PHY  */
                        /* disable auto-neg, set speed, powerup  */
                        phy_config = (MIICR_REG_PCR | (speed | duplex));
-                       slic_reg32_write(wphy, phy_config, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WPHY, phy_config);
                }
        }
 }
        const struct firmware *fw;
        const char *file = "";
        int ret;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
        u32 codeaddr;
        u32 instruction;
        int index = 0;
                break;
        }
        /* start download */
-       slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
+       slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_BEGIN);
        /* download the rcv sequencer ucode */
        for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
                /* write out instruction address */
-               slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
+               slic_write32(adapter, SLIC_REG_RCV_WCS, codeaddr);
 
                instruction = *(u32 *)(fw->data + index);
                index += 4;
                /* write out the instruction data low addr */
-               slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
+               slic_write32(adapter, SLIC_REG_RCV_WCS, instruction);
 
                instruction = *(u8 *)(fw->data + index);
                index++;
                /* write out the instruction data high addr */
-               slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
-                                FLUSH);
+               slic_write32(adapter, SLIC_REG_RCV_WCS, instruction);
        }
 
        /* download finished */
        release_firmware(fw);
-       slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
+       slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_FINISH);
        slic_flush_write(adapter);
 
        return 0;
        u32 section;
        int thissectionsize;
        int codeaddr;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
        u32 instruction;
        u32 baseaddress;
        u32 i;
 
                for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
                        /* Write out instruction address */
-                       slic_reg32_write(&slic_regs->slic_wcs,
-                                        baseaddress + codeaddr, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WCS,
+                                    baseaddress + codeaddr);
                        /* Write out instruction to low addr */
-                       slic_reg32_write(&slic_regs->slic_wcs,
-                                       instruction, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WCS,
+                                    instruction);
                        instruction = *(u32 *)(fw->data + index);
                        index += 4;
 
                        /* Write out instruction to high addr */
-                       slic_reg32_write(&slic_regs->slic_wcs,
-                                       instruction, FLUSH);
+                       slic_write32(adapter, SLIC_REG_WCS,
+                                    instruction);
                        instruction = *(u32 *)(fw->data + index);
                        index += 4;
                }
 
                for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
                        /* Write out instruction address */
-                       slic_reg32_write(&slic_regs->slic_wcs,
-                               SLIC_WCS_COMPARE | (baseaddress + codeaddr),
-                               FLUSH);
+                       slic_write32(adapter, SLIC_REG_WCS,
+                                    SLIC_WCS_COMPARE | (baseaddress +
+                                                        codeaddr));
                        /* Write out instruction to low addr */
-                       slic_reg32_write(&slic_regs->slic_wcs, instruction,
-                                        FLUSH);
+                       slic_write32(adapter, SLIC_REG_WCS, instruction);
                        instruction = *(u32 *)(fw->data + index);
                        index += 4;
                        /* Write out instruction to high addr */
-                       slic_reg32_write(&slic_regs->slic_wcs, instruction,
-                                        FLUSH);
+                       slic_write32(adapter, SLIC_REG_WCS, instruction);
                        instruction = *(u32 *)(fw->data + index);
                        index += 4;
 
        release_firmware(fw);
        /* Everything OK, kick off the card */
        mdelay(10);
-       slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
-       slic_flush_write(adapter);
 
+       slic_write32(adapter, SLIC_REG_WCS, SLIC_WCS_START);
+       slic_flush_write(adapter);
        /*
         * stall for 20 ms, long enough for ucode to init card
         * and reach mainloop
 
 static void slic_intagg_set(struct adapter *adapter, u32 value)
 {
-       slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
+       slic_write32(adapter, SLIC_REG_INTAGG, value);
        adapter->card->loadlevel_current = value;
 }
 
 static void slic_soft_reset(struct adapter *adapter)
 {
        if (adapter->card->state == CARD_UP) {
-               slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
+               slic_write32(adapter, SLIC_REG_QUIESCE, 0);
                slic_flush_write(adapter);
                mdelay(1);
        }
 
-       slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
-                        FLUSH);
+       slic_write32(adapter, SLIC_REG_RESET, SLIC_RESET_MAGIC);
        slic_flush_write(adapter);
+
        mdelay(1);
 }
 
 {
        u32 value;
        u32 value2;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
 
        value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
-       slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
-       slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
+       slic_write32(adapter, SLIC_REG_WRADDRAL, value);
+       slic_write32(adapter, SLIC_REG_WRADDRBL, value);
 
        value2 = (u32)((adapter->currmacaddr[0] << 8 |
                             adapter->currmacaddr[1]) & 0xFFFF);
 
-       slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
-       slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
+       slic_write32(adapter, SLIC_REG_WRADDRAH, value2);
+       slic_write32(adapter, SLIC_REG_WRADDRBH, value2);
 
        /*
         * Write our multicast mask out to the card.  This is done
 static void slic_mac_config(struct adapter *adapter)
 {
        u32 value;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
 
        /* Setup GMAC gaps */
        if (adapter->linkspeed == LINK_1000MB) {
        }
 
        /* write mac config */
-       slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
+       slic_write32(adapter, SLIC_REG_WMCFG, value);
 
        /* setup mac addresses */
        slic_mac_address_config(adapter);
 {
        u32 value;
        u32 RcrReset;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
 
        if (linkchange) {
                /* Setup MAC */
                         GXCR_XMTEN |   /* Enable transmit  */
                         GXCR_PAUSEEN); /* Enable pause     */
 
-               slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
+               slic_write32(adapter, SLIC_REG_WXCFG, value);
 
                /* Setup rcvcfg last */
                value = (RcrReset |     /* Reset, if linkchange */
                value = (GXCR_RESET |   /* Always reset     */
                         GXCR_XMTEN);   /* Enable transmit  */
 
-               slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
+               slic_write32(adapter, SLIC_REG_WXCFG, value);
 
                /* Setup rcvcfg last */
                value = (RcrReset |     /* Reset, if linkchange */
        if (adapter->macopts & MAC_PROMISC)
                value |= GRCR_RCVALL;
 
-       slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
+       slic_write32(adapter, SLIC_REG_WRCFG, value);
 }
 
 /*
 {
        u32 value;
        u32 phy_config;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
 
        /* Setup xmtcfg */
        value = (GXCR_RESET |   /* Always reset */
                 GXCR_PAUSEEN); /* Enable pause */
 
-       slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
+       slic_write32(adapter, SLIC_REG_WXCFG, value);
 
        value = (GRCR_RESET |   /* Always reset      */
                 GRCR_CTLEN |   /* Enable CTL frames */
                 GRCR_ADDRAEN | /* Address A enable  */
                 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
 
-       slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
+       slic_write32(adapter, SLIC_REG_WRCFG, value);
 
        /* power down phy */
        phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
-       slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
+       slic_write32(adapter, SLIC_REG_WPHY, phy_config);
 }
 
 static bool slic_mac_filter(struct adapter *adapter,
 {
        struct sliccard *card = (struct sliccard *)cardaddr;
        struct adapter *adapter = card->master;
-       u32 __iomem *intagg;
        u32 load = card->events;
        u32 level = 0;
 
        if ((adapter) && (adapter->state == ADAPT_UP) &&
            (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
-               intagg = &adapter->slic_regs->slic_intagg;
                if (adapter->devid == SLIC_1GB_DEVICE_ID) {
                        if (adapter->linkspeed == LINK_1000MB)
                                level = 100;
                        }
                        if (card->loadlevel_current != level) {
                                card->loadlevel_current = level;
-                               slic_reg32_write(intagg, level, FLUSH);
+                               slic_write32(adapter, SLIC_REG_INTAGG, level);
                        }
                } else {
                        if (load > SLIC_LOAD_5)
                                level = SLIC_INTAGG_0;
                        if (card->loadlevel_current != level) {
                                card->loadlevel_current = level;
-                               slic_reg32_write(intagg, level, FLUSH);
+                               slic_write32(adapter, SLIC_REG_INTAGG, level);
                        }
                }
        }
 static void slic_upr_start(struct adapter *adapter)
 {
        struct slic_upr *upr;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
 
        upr = adapter->upr_list;
        if (!upr)
        switch (upr->upr_request) {
        case SLIC_UPR_STATS:
                if (upr->upr_data_h == 0) {
-                       slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
-                                        FLUSH);
+                       slic_write32(adapter, SLIC_REG_RSTAT, upr->upr_data);
                } else {
-                       slic_reg64_write(adapter, &slic_regs->slic_stats64,
-                                        upr->upr_data,
-                                        &slic_regs->slic_addr_upper,
-                                        upr->upr_data_h, FLUSH);
+                       slic_write64(adapter, SLIC_REG_RSTAT64, upr->upr_data,
+                                    upr->upr_data_h);
                }
                break;
 
        case SLIC_UPR_RLSR:
-               slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
-                                &slic_regs->slic_addr_upper, upr->upr_data_h,
-                                FLUSH);
+               slic_write64(adapter, SLIC_REG_LSTAT, upr->upr_data,
+                            upr->upr_data_h);
                break;
 
        case SLIC_UPR_RCONFIG:
-               slic_reg64_write(adapter, &slic_regs->slic_rconfig,
-                                upr->upr_data, &slic_regs->slic_addr_upper,
-                                upr->upr_data_h, FLUSH);
+               slic_write64(adapter, SLIC_REG_RCONFIG, upr->upr_data,
+                            upr->upr_data_h);
                break;
        case SLIC_UPR_PING:
-               slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
+               slic_write32(adapter, SLIC_REG_PING, 1);
                break;
        }
        slic_flush_write(adapter);
 {
        int i;
        struct slic_rspqueue *rspq = &adapter->rspqueue;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
        u32 paddrh = 0;
 
        memset(rspq, 0, sizeof(struct slic_rspqueue));
                }
 
                if (paddrh == 0) {
-                       slic_reg32_write(&slic_regs->slic_rbar,
-                               (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
-                               DONT_FLUSH);
+                       slic_write32(adapter, SLIC_REG_RBAR,
+                                    rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE);
                } else {
-                       slic_reg64_write(adapter, &slic_regs->slic_rbar64,
-                               (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
-                               &slic_regs->slic_addr_upper,
-                               paddrh, DONT_FLUSH);
+                       slic_write64(adapter, SLIC_REG_RBAR64,
+                                    rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE,
+                                    paddrh);
                }
        }
        rspq->offset = 0;
        if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
                rspq->rspbuf++;
        } else {
-               slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
-                       (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
-                       &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
+               slic_write64(adapter, SLIC_REG_RBAR64,
+                            rspq->paddr[rspq->pageindex] |
+                            SLIC_RSPQ_BUFSINPAGE, 0);
                rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
                rspq->offset = 0;
                rspq->rspbuf = (struct slic_rspbuf *)
                        }
 #endif
                        if (paddrh == 0) {
-                               slic_reg32_write(&adapter->slic_regs->slic_hbar,
-                                                (u32)paddrl, DONT_FLUSH);
+                               slic_write32(adapter, SLIC_REG_HBAR,
+                                            (u32)paddrl);
                        } else {
-                               slic_reg64_write(adapter,
-                                       &adapter->slic_regs->slic_hbar64,
-                                       paddrl,
-                                       &adapter->slic_regs->slic_addr_upper,
-                                       paddrh, DONT_FLUSH);
+                               slic_write64(adapter, SLIC_REG_HBAR64, paddrl,
+                                            paddrh);
                        }
                        if (rcvq->head)
                                rcvq->tail->next = skb;
                dev_err(dev, "         rcvq->count[%x]\n", rcvq->count);
        }
        if (paddrh == 0) {
-               slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
-                                DONT_FLUSH);
+               slic_write32(adapter, SLIC_REG_HBAR, (u32)paddrl);
        } else {
-               slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
-                                paddrl, &adapter->slic_regs->slic_addr_upper,
-                                paddrh, DONT_FLUSH);
+               slic_write64(adapter, SLIC_REG_HBAR64, paddrl, paddrh);
        }
        if (rcvq->head)
                rcvq->tail->next = skb;
        u32 isr;
 
        if ((adapter->pshmem) && (adapter->pshmem->isr)) {
-               slic_reg32_write(&adapter->slic_regs->slic_icr,
-                                ICR_INT_MASK, FLUSH);
+               slic_write32(adapter, SLIC_REG_ICR, ICR_INT_MASK);
                slic_flush_write(adapter);
+
                isr = adapter->isrcopy = adapter->pshmem->isr;
                adapter->pshmem->isr = 0;
                adapter->num_isrs++;
                adapter->isrcopy = 0;
                adapter->all_reg_writes += 2;
                adapter->isr_reg_writes++;
-               slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
+               slic_write32(adapter, SLIC_REG_ISR, 0);
        } else {
                adapter->false_interrupts++;
        }
        }
 #endif
        if (hcmd->paddrh == 0) {
-               slic_reg32_write(&adapter->slic_regs->slic_cbar,
-                                (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
+               slic_write32(adapter, SLIC_REG_CBAR, (hcmd->paddrl |
+                                                     hcmd->cmdsize));
        } else {
-               slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
-                                (hcmd->paddrl | hcmd->cmdsize),
-                                &adapter->slic_regs->slic_addr_upper,
-                                hcmd->paddrh, DONT_FLUSH);
+               slic_write64(adapter, SLIC_REG_CBAR64,
+                            hcmd->paddrl | hcmd->cmdsize, hcmd->paddrh);
        }
 xmit_done:
        return NETDEV_TX_OK;
 {
        struct sliccard *card = adapter->card;
        struct net_device *dev = adapter->netdev;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
        struct slic_shmem *pshmem;
        int rc;
 
                adapter->queues_initialized = 1;
        }
 
-       slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
+       slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
        slic_flush_write(adapter);
        mdelay(1);
 
                spin_lock_irqsave(&adapter->bit64reglock, flags);
 
 #if BITS_PER_LONG == 64
-               slic_reg32_write(&slic_regs->slic_addr_upper,
-                                SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
-               slic_reg32_write(&slic_regs->slic_isp,
-                                SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
+               slic_write32(adapter, SLIC_REG_ADDR_UPPER,
+                            SLIC_GET_ADDR_HIGH(&pshmem->isr));
+               slic_write32(adapter, SLIC_REG_ISP,
+                            SLIC_GET_ADDR_LOW(&pshmem->isr));
 #else
-               slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
-               slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr,
-                               FLUSH);
+               slic_write32(adapter, SLIC_REG_ADDR_UPPER, 0);
+               slic_write32(adapter, SLIC_REG_ISP, (u32)&pshmem->isr);
 #endif
                spin_unlock_irqrestore(&adapter->bit64reglock, flags);
                adapter->isp_initialized = 1;
         */
        adapter->isrcopy = 0;
        adapter->pshmem->isr = 0;
-       slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
-       slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
+       slic_write32(adapter, SLIC_REG_ISR, 0);
+       slic_write32(adapter, SLIC_REG_ICR, ICR_INT_ON);
 
        slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
        slic_flush_write(adapter);
+
        rc = slic_link_event_handler(adapter);
        if (rc) {
                /* disable interrupts then clear pending events */
-               slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
-               slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
+               slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
+               slic_write32(adapter, SLIC_REG_ISR, 0);
                slic_flush_write(adapter);
+
                if (adapter->pingtimerset) {
                        del_timer(&adapter->pingtimer);
                        adapter->pingtimerset = 0;
        unregister_netdev(dev);
 
        slic_adapter_freeresources(adapter);
-       slic_unmap_mmio_space(adapter);
+       iounmap(adapter->regs);
 
        /* free multicast addresses */
        mlist = adapter->mcastaddrs;
 {
        struct adapter *adapter = netdev_priv(dev);
        struct sliccard *card = adapter->card;
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
        unsigned long flags;
 
        spin_lock_irqsave(&slic_global.driver_lock, flags);
        adapter->upr_list = NULL;
        adapter->upr_busy = 0;
        adapter->devflags_prev = 0;
-       slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
+       slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
        adapter->all_reg_writes++;
        adapter->icr_reg_writes++;
        slic_config_clear(adapter);
                adapter->activated = 0;
        }
 #ifdef AUTOMATIC_RESET
-       slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
+       slic_write32(adapter, SLIC_REG_RESET_IFACE, 0);
 #endif
        slic_flush_write(adapter);
+
        /*
         *  Reset the adapter's cmd queues
         */
 
 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
 {
-       __iomem struct slic_regs *slic_regs = adapter->slic_regs;
        struct slic_eeprom *peeprom;
        struct oslic_eeprom *pOeeprom;
        dma_addr_t phys_config;
 
                memset(peeprom, 0, sizeof(struct slic_eeprom));
 
-               slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
+               slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
                slic_flush_write(adapter);
                mdelay(1);
                pshmem = (struct slic_shmem *)(unsigned long)
                         adapter->phys_shmem;
 
                spin_lock_irqsave(&adapter->bit64reglock, flags);
-               slic_reg32_write(&slic_regs->slic_addr_upper,
-                                SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
-               slic_reg32_write(&slic_regs->slic_isp,
-                                SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
+               slic_write32(adapter, SLIC_REG_ADDR_UPPER,
+                            SLIC_GET_ADDR_HIGH(&pshmem->isr));
+               slic_write32(adapter, SLIC_REG_ISP,
+                            SLIC_GET_ADDR_LOW(&pshmem->isr));
                spin_unlock_irqrestore(&adapter->bit64reglock, flags);
 
                status = slic_config_get(adapter, phys_configl, phys_configh);
                        if (adapter->pshmem->isr) {
                                if (adapter->pshmem->isr & ISR_UPC) {
                                        adapter->pshmem->isr = 0;
-                                       slic_reg64_write(adapter,
-                                               &slic_regs->slic_isp, 0,
-                                               &slic_regs->slic_addr_upper,
-                                               0, FLUSH);
-                                       slic_reg32_write(&slic_regs->slic_isr,
-                                                        0, FLUSH);
+                                       slic_write64(adapter, SLIC_REG_ISP, 0,
+                                                    0);
+                                       slic_write32(adapter, SLIC_REG_ISR, 0);
                                        slic_flush_write(adapter);
 
                                        slic_upr_request_complete(adapter, 0);
                                }
 
                                adapter->pshmem->isr = 0;
-                               slic_reg32_write(&slic_regs->slic_isr,
-                                                0, FLUSH);
+                               slic_write32(adapter, SLIC_REG_ISR, 0);
                                slic_flush_write(adapter);
                        } else {
                                mdelay(1);
                                if (i > 5000) {
                                        dev_err(&adapter->pcidev->dev,
                                                "Fetch of config data timed out.\n");
-                                       slic_reg64_write(adapter,
-                                               &slic_regs->slic_isp, 0,
-                                               &slic_regs->slic_addr_upper,
-                                               0, FLUSH);
+                                       slic_write64(adapter, SLIC_REG_ISP,
+                                                    0, 0);
                                        slic_flush_write(adapter);
+
                                        status = -EINVAL;
                                        goto card_init_err;
                                }
                                    peeprom, phys_config);
 
                if (!card->config.EepromValid) {
-                       slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
-                                        &slic_regs->slic_addr_upper,
-                                        0, FLUSH);
+                       slic_write64(adapter, SLIC_REG_ISP, 0, 0);
                        slic_flush_write(adapter);
                        dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
                        return -EINVAL;
        adapter->busnumber = pcidev->bus->number;
        adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
        adapter->functionnumber = (pcidev->devfn & 0x7);
-       adapter->slic_regs = memaddr;
        adapter->regs = memaddr;
        adapter->irq = pcidev->irq;
        adapter->chipid = chip_idx;
        struct sliccard *card = slic_global.slic_card;
        struct physcard *physcard = slic_global.phys_card;
        ushort card_hostid;
-       u16 __iomem *hostid_reg;
        uint i;
-       uint rdhostid_offset = 0;
-
-       switch (adapter->devid) {
-       case SLIC_2GB_DEVICE_ID:
-               rdhostid_offset = SLIC_RDHOSTID_2GB;
-               break;
-       case SLIC_1GB_DEVICE_ID:
-               rdhostid_offset = SLIC_RDHOSTID_1GB;
-               break;
-       default:
-               return -ENODEV;
-       }
-
-       hostid_reg =
-           (u16 __iomem *)(((u8 __iomem *)(adapter->slic_regs)) +
-           rdhostid_offset);
 
-       /* read the 16 bit hostid from SRAM */
-       card_hostid = (ushort)readw(hostid_reg);
+       card_hostid = slic_read32(adapter, SLIC_REG_HOSTID);
 
        /* Initialize a new card structure if need be */
        if (card_hostid == SLIC_HOSTID_DEFAULT) {