PCI: aerdrv: RsvdP of PCI_ERR_ROOT_COMMAND

Handle preserved bits properly.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 7a711ee314b7f6a6c3da38b4b47082c859e8dfa2..4e845ab186438ee143804068cf398488fbe854d1 100644 (file)
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -234,13 +234,15 @@ static int __devinit aer_probe(struct pcie_device *dev)
 static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
 {
        u16 p2p_ctrl;
-       u32 status;
+       u32 reg32;
        int pos;
 
        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
 
        /* Disable Root's interrupt in response to error messages */
-       pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, 0);
+       pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, &reg32);
+       reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
+       pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
 
        /* Assert Secondary Bus Reset */
        pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
@@ -265,12 +267,14 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
        msleep(200);
        dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n");
 
+       /* Clear Root Error Status */
+       pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
+       pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, reg32);
+
        /* Enable Root Port's interrupt in response to error messages */
-       pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &status);
-       pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, status);
-       pci_write_config_dword(dev,
-               pos + PCI_ERR_ROOT_COMMAND,
-               ROOT_PORT_INTR_ON_MESG_MASK);
+       pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, &reg32);
+       reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
+       pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
 
        return PCI_ERS_RESULT_RECOVERED;
 }

diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index aceb04b67b60f55979258256e84e93209faf3f24..9754a09bf20ebb4921054df4f0256dc03ef3baa6 100644 (file)
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -623,9 +623,9 @@ void aer_enable_rootport(struct aer_rpc *rpc)
        set_downstream_devices_error_reporting(pdev, true);
 
        /* Enable Root Port's interrupt in response to error messages */
-       pci_write_config_dword(pdev,
-               aer_pos + PCI_ERR_ROOT_COMMAND,
-               ROOT_PORT_INTR_ON_MESG_MASK);
+       pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, &reg32);
+       reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
+       pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, reg32);
 }
 
 /**
@@ -648,7 +648,9 @@ static void disable_root_aer(struct aer_rpc *rpc)
 
        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
        /* Disable Root's interrupt in response to error messages */
-       pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, 0);
+       pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, &reg32);
+       reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
+       pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, reg32);
 
        /* Clear Root's error status reg */
        pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, &reg32);