struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
 
        if (voltage->type == VOLTAGE_SW) {
-               /* 0xff01 is a flag rather then an actual voltage */
-               if (voltage->voltage == 0xff01)
+               /* 0xff0x are flags rather then an actual voltage */
+               if ((voltage->voltage & 0xff00) == 0xff00)
                        return;
                if (voltage->voltage && (voltage->voltage != rdev->pm.current_vddc)) {
                        radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
                        voltage = &rdev->pm.power_state[req_ps_idx].
                                clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].voltage;
 
-               /* 0xff01 is a flag rather then an actual voltage */
-               if (voltage->vddci == 0xff01)
+               /* 0xff0x are flags rather then an actual voltage */
+               if ((voltage->vddci & 0xff00) == 0xff00)
                        return;
                if (voltage->vddci && (voltage->vddci != rdev->pm.current_vddci)) {
                        radeon_atom_set_voltage(rdev, voltage->vddci, SET_VOLTAGE_TYPE_ASIC_VDDCI);
 
        case ATOM_VIRTUAL_VOLTAGE_ID1:
        case ATOM_VIRTUAL_VOLTAGE_ID2:
        case ATOM_VIRTUAL_VOLTAGE_ID3:
+       case ATOM_VIRTUAL_VOLTAGE_ID4:
+       case ATOM_VIRTUAL_VOLTAGE_ID5:
+       case ATOM_VIRTUAL_VOLTAGE_ID6:
+       case ATOM_VIRTUAL_VOLTAGE_ID7:
                if (radeon_atom_get_max_vddc(rdev, VOLTAGE_TYPE_VDDC,
                                             rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage,
                                             &vddc) == 0)
 
 {
        /* set up the default clocks if the MC ucode is loaded */
        if ((rdev->family >= CHIP_BARTS) &&
-           (rdev->family <= CHIP_CAYMAN) &&
+           (rdev->family <= CHIP_HAINAN) &&
            rdev->mc_fw) {
                if (rdev->pm.default_vddc)
                        radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
        if (ret) {
                DRM_ERROR("radeon: dpm resume failed\n");
                if ((rdev->family >= CHIP_BARTS) &&
-                   (rdev->family <= CHIP_CAYMAN) &&
+                   (rdev->family <= CHIP_HAINAN) &&
                    rdev->mc_fw) {
                        if (rdev->pm.default_vddc)
                                radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
                radeon_pm_init_profile(rdev);
                /* set up the default clocks if the MC ucode is loaded */
                if ((rdev->family >= CHIP_BARTS) &&
-                   (rdev->family <= CHIP_CAYMAN) &&
+                   (rdev->family <= CHIP_HAINAN) &&
                    rdev->mc_fw) {
                        if (rdev->pm.default_vddc)
                                radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
        if (ret) {
                rdev->pm.dpm_enabled = false;
                if ((rdev->family >= CHIP_BARTS) &&
-                   (rdev->family <= CHIP_CAYMAN) &&
+                   (rdev->family <= CHIP_HAINAN) &&
                    rdev->mc_fw) {
                        if (rdev->pm.default_vddc)
                                radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,