writel(icr, _ICR(i2c));
 }
 
+#define VALID_INT_SOURCE       (ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
+                               ISR_SAD | ISR_BED)
 static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
 {
        struct pxa_i2c *i2c = dev_id;
        u32 isr = readl(_ISR(i2c));
 
+       isr &= VALID_INT_SOURCE;
+       if (!isr)
+               return IRQ_NONE;
+
        if (i2c_debug > 2 && 0) {
                dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
                        __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
        /*
         * Always clear all pending IRQs.
         */
-       writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c));
+       writel(isr, _ISR(i2c));
 
        if (isr & ISR_SAD)
                i2c_pxa_slave_start(i2c, isr);
                i2c->adap.algo = &i2c_pxa_pio_algorithm;
        } else {
                i2c->adap.algo = &i2c_pxa_algorithm;
-               ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED,
+               ret = request_irq(irq, i2c_pxa_handler, IRQF_SHARED,
                                  i2c->adap.name, i2c);
                if (ret)
                        goto ereqirq;