#define HAS_HW_CONTEXTS(dev)   (INTEL_INFO(dev)->gen >= 6)
 #define HAS_ALIASING_PPGTT(dev)        (INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev))
-#define HAS_PPGTT(dev)         (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev) && !IS_BROADWELL(dev))
-#define USES_ALIASING_PPGTT(dev) intel_enable_ppgtt(dev, false)
+#define HAS_PPGTT(dev)         (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev) \
+                                && !IS_BROADWELL(dev))
+#define USES_PPGTT(dev)                intel_enable_ppgtt(dev, false)
 #define USES_FULL_PPGTT(dev)   intel_enable_ppgtt(dev, true)
 
 #define HAS_OVERLAY(dev)               (INTEL_INFO(dev)->has_overlay)
 
        struct i915_hw_ppgtt *ppgtt = NULL;
 
        /* We refcount even the aliasing PPGTT to keep the code symmetric */
-       if (USES_ALIASING_PPGTT(ctx->obj->base.dev))
+       if (USES_PPGTT(ctx->obj->base.dev))
                ppgtt = ctx_to_ppgtt(ctx);
 
        /* XXX: Free up the object before tearing down the address space, in
 
                        dev_priv->mm.aliasing_ppgtt = ppgtt;
                }
-       } else if (USES_ALIASING_PPGTT(dev)) {
+       } else if (USES_PPGTT(dev)) {
                /* For platforms which only have aliasing PPGTT, we fake the
                 * address space and refcounting. */
                ctx->vm = &dev_priv->mm.aliasing_ppgtt->base;
        }
 
        dev_priv->ring[RCS].default_context =
-               i915_gem_create_context(dev, NULL, USES_ALIASING_PPGTT(dev));
+               i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
 
        if (IS_ERR_OR_NULL(dev_priv->ring[RCS].default_context)) {
                DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %ld\n",