#define MLX5E_SQ_BF_BUDGET             16
 
 #define MLX5E_NUM_MAIN_GROUPS 9
-#define MLX5E_NET_IP_ALIGN 2
 
 static inline u16 mlx5_min_rx_wqes(int wq_type, u32 wq_size)
 {
 
                rq->wqe_sz = (priv->params.lro_en) ?
                                priv->params.lro_wqe_sz :
                                MLX5E_SW2HW_MTU(priv->netdev->mtu);
-               rq->wqe_sz = SKB_DATA_ALIGN(rq->wqe_sz + MLX5E_NET_IP_ALIGN);
-               byte_count = rq->wqe_sz - MLX5E_NET_IP_ALIGN;
+               rq->wqe_sz = SKB_DATA_ALIGN(rq->wqe_sz);
+               byte_count = rq->wqe_sz;
                byte_count |= MLX5_HW_START_PADDING;
        }
 
 
        struct sk_buff *skb;
        dma_addr_t dma_addr;
 
-       skb = netdev_alloc_skb(rq->netdev, rq->wqe_sz);
+       skb = napi_alloc_skb(rq->cq.napi, rq->wqe_sz);
        if (unlikely(!skb))
                return -ENOMEM;
 
        if (unlikely(dma_mapping_error(rq->pdev, dma_addr)))
                goto err_free_skb;
 
-       skb_reserve(skb, MLX5E_NET_IP_ALIGN);
-
        *((dma_addr_t *)skb->cb) = dma_addr;
-       wqe->data.addr = cpu_to_be64(dma_addr + MLX5E_NET_IP_ALIGN);
+       wqe->data.addr = cpu_to_be64(dma_addr);
        wqe->data.lkey = rq->mkey_be;
 
        rq->skb[ix] = skb;
                goto mpwrq_cqe_out;
        }
 
-       skb = netdev_alloc_skb(rq->netdev,
-                              ALIGN(MLX5_MPWRQ_SMALL_PACKET_THRESHOLD,
-                                    sizeof(long)));
+       skb = napi_alloc_skb(rq->cq.napi,
+                            ALIGN(MLX5_MPWRQ_SMALL_PACKET_THRESHOLD,
+                                  sizeof(long)));
        if (unlikely(!skb))
                goto mpwrq_cqe_out;