uint64_t last;
        int idx;
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return;
 
        BUG_ON(!IS_ALIGNED(pos, 4) || !IS_ALIGNED(size, 4));
 
                        drm_sched_stop(&ring->sched, NULL);
 
                /* You can't wait for HW to signal if it's gone */
-               if (!drm_dev_is_unplugged(&adev->ddev))
+               if (!drm_dev_is_unplugged(adev_to_drm(adev)))
                        r = amdgpu_fence_wait_empty(ring);
                else
                        r = -ENODEV;
 
                return -EINVAL;
        }
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return 0;
 
        t = offset / AMDGPU_GPU_PAGE_SIZE;
                return -EINVAL;
        }
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return 0;
 
        t = offset / AMDGPU_GPU_PAGE_SIZE;
 
        u64 gart_ptb_gpu_pa = amdgpu_gmc_vram_pa(adev, adev->gart.bo);
        int idx;
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return;
 
        flags |= AMDGPU_PTE_VALID | AMDGPU_PTE_READABLE;
 
        struct amdgpu_device *adev = ring->adev;
        int idx;
 
-       if (!drm_dev_enter(&adev->ddev, &idx)) {
+       if (!drm_dev_enter(adev_to_drm(adev), &idx)) {
                DRM_INFO("%s - device unplugged skipping recovery on scheduler:%s",
                         __func__, s_job->sched->name);
 
 
        if (psp->adev->no_hw_access)
                return 0;
 
-       if (!drm_dev_enter(&psp->adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(psp->adev), &idx))
                return 0;
 
        memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);
 {
        int idx;
 
-       if (!drm_dev_enter(&psp->adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(psp->adev), &idx))
                return;
 
        memset(psp->fw_pri_buf, 0, PSP_1_MEG);
 
                if (!adev->uvd.inst[j].saved_bo)
                        return -ENOMEM;
 
-               if (drm_dev_enter(&adev->ddev, &idx)) {
+               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                        /* re-write 0 since err_event_athub will corrupt VCPU buffer */
                        if (in_ras_intr)
                                memset(adev->uvd.inst[j].saved_bo, 0, size);
                ptr = adev->uvd.inst[i].cpu_addr;
 
                if (adev->uvd.inst[i].saved_bo != NULL) {
-                       if (drm_dev_enter(&adev->ddev, &idx)) {
+                       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                                memcpy_toio(ptr, adev->uvd.inst[i].saved_bo, size);
                                drm_dev_exit(idx);
                        }
                        hdr = (const struct common_firmware_header *)adev->uvd.fw->data;
                        if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
                                offset = le32_to_cpu(hdr->ucode_array_offset_bytes);
-                               if (drm_dev_enter(&adev->ddev, &idx)) {
+                               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                                        memcpy_toio(adev->uvd.inst[i].cpu_addr, adev->uvd.fw->data + offset,
                                                    le32_to_cpu(hdr->ucode_size_bytes));
                                        drm_dev_exit(idx);
 
        hdr = (const struct common_firmware_header *)adev->vce.fw->data;
        offset = le32_to_cpu(hdr->ucode_array_offset_bytes);
 
-       if (drm_dev_enter(&adev->ddev, &idx)) {
+       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                memcpy_toio(cpu_addr, adev->vce.fw->data + offset,
                            adev->vce.fw->size - offset);
                drm_dev_exit(idx);
 
                if (!adev->vcn.inst[i].saved_bo)
                        return -ENOMEM;
 
-               if (drm_dev_enter(&adev->ddev, &idx)) {
+               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                        memcpy_fromio(adev->vcn.inst[i].saved_bo, ptr, size);
                        drm_dev_exit(idx);
                }
                ptr = adev->vcn.inst[i].cpu_addr;
 
                if (adev->vcn.inst[i].saved_bo != NULL) {
-                       if (drm_dev_enter(&adev->ddev, &idx)) {
+                       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                                memcpy_toio(ptr, adev->vcn.inst[i].saved_bo, size);
                                drm_dev_exit(idx);
                        }
                        hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
                        if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
                                offset = le32_to_cpu(hdr->ucode_array_offset_bytes);
-                               if (drm_dev_enter(&adev->ddev, &idx)) {
+                               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                                        memcpy_toio(adev->vcn.inst[i].cpu_addr, adev->vcn.fw->data + offset,
                                                    le32_to_cpu(hdr->ucode_size_bytes));
                                        drm_dev_exit(idx);
 
                        return r;
        }
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return -ENODEV;
 
        r = vm->update_funcs->map_table(vmbo);
        if (list_empty(&vm->relocated))
                return 0;
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return -ENODEV;
 
        memset(¶ms, 0, sizeof(params));
        enum amdgpu_sync_mode sync_mode;
        int r, idx;
 
-       if (!drm_dev_enter(&adev->ddev, &idx))
+       if (!drm_dev_enter(adev_to_drm(adev), &idx))
                return -ENODEV;
 
        memset(¶ms, 0, sizeof(params));
 
                        return -ENOMEM;
                }
 
-               if (drm_dev_enter(&adev->ddev, &idx)) {
+               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                        memcpy_fromio(buf, adev->mman.aper_base_kaddr, sz);
                        ret = psp_v11_0_memory_training_send_msg(psp, PSP_BL__DRAM_LONG_TRAIN);
                        if (ret) {
 
        if (adev->vce.vcpu_bo == NULL)
                return 0;
 
-       if (drm_dev_enter(&adev->ddev, &idx)) {
+       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                        unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo);
                        void *ptr = adev->vce.cpu_addr;
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
 
-               if (drm_dev_enter(&adev->ddev, &idx)) {
+               if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                        unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo);
                        void *ptr = adev->vce.cpu_addr;
 
 
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared_cpu_addr;
 
-       if (drm_dev_enter(&adev->ddev, &idx)) {
+       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                fw_shared->present_flag_0 = 0;
                drm_dev_exit(idx);
        }
 
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        volatile struct amdgpu_fw_shared *fw_shared;
 
-       if (drm_dev_enter(&adev->ddev, &idx)) {
+       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
                        if (adev->vcn.harvest_config & (1 << i))
                                continue;
 
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        int i, r, idx;
 
-       if (drm_dev_enter(&adev->ddev, &idx)) {
+       if (drm_dev_enter(adev_to_drm(adev), &idx)) {
                for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
                        volatile struct amdgpu_fw_shared *fw_shared;