arm64: dts: qcom: correct gpio-ranges for QCS8300

Correct the gpio-ranges for the QCS8300 TLMM pin controller to include
GPIOs 0-132 and the UFS_RESET pin for primary UFS memory reset.

Fixes: 7be190e4bdd2 ("arm64: dts: qcom: add QCS8300 platform")
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241219-correct_gpio_ranges-v2-6-19af8588dbd0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 0febf4d63467f92e93a8e63086fcf39ba5b62cad..63712d9a4468ffdcbf2599ad66f82e1a7a43749c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -2762,7 +2762,7 @@
                        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
                        gpio-controller;
                        #gpio-cells = <2>;
-                       gpio-ranges = <&tlmm 0 0 133>;
+                       gpio-ranges = <&tlmm 0 0 134>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
                        wakeup-parent = <&pdc>;