]> www.infradead.org Git - users/hch/block.git/commitdiff
spi: dw: Parameterize the DMA Rx/Tx burst length
authorSerge Semin <Sergey.Semin@baikalelectronics.ru>
Fri, 29 May 2020 13:11:55 +0000 (16:11 +0300)
committerMark Brown <broonie@kernel.org>
Fri, 29 May 2020 14:55:46 +0000 (15:55 +0100)
It isn't good to have numeric literals in the code especially if there
are multiple of them and they are related. Let's replace the Tx and Rx
burst level literals with the corresponding constants.

Co-developed-by: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
Co-developed-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
Signed-off-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Feng Tang <feng.tang@intel.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Link: https://lore.kernel.org/r/20200529131205.31838-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-dw-mid.c

index abd6955ad1f790c9c5bbaf8fb0cd25f28ad92e5f..189b517f77fcccd6b140d05a6d919a654da11387 100644 (file)
@@ -21,7 +21,9 @@
 
 #define WAIT_RETRIES   5
 #define RX_BUSY                0
+#define RX_BURST_LEVEL 16
 #define TX_BUSY                1
+#define TX_BURST_LEVEL 16
 
 static bool mid_spi_dma_chan_filter(struct dma_chan *chan, void *param)
 {
@@ -227,7 +229,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws,
        memset(&txconf, 0, sizeof(txconf));
        txconf.direction = DMA_MEM_TO_DEV;
        txconf.dst_addr = dws->dma_addr;
-       txconf.dst_maxburst = 16;
+       txconf.dst_maxburst = TX_BURST_LEVEL;
        txconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
        txconf.dst_addr_width = convert_dma_width(dws->n_bytes);
        txconf.device_fc = false;
@@ -319,7 +321,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
        memset(&rxconf, 0, sizeof(rxconf));
        rxconf.direction = DMA_DEV_TO_MEM;
        rxconf.src_addr = dws->dma_addr;
-       rxconf.src_maxburst = 16;
+       rxconf.src_maxburst = RX_BURST_LEVEL;
        rxconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
        rxconf.src_addr_width = convert_dma_width(dws->n_bytes);
        rxconf.device_fc = false;
@@ -344,8 +346,8 @@ static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
 {
        u16 imr = 0, dma_ctrl = 0;
 
-       dw_writel(dws, DW_SPI_DMARDLR, 0xf);
-       dw_writel(dws, DW_SPI_DMATDLR, 0x10);
+       dw_writel(dws, DW_SPI_DMARDLR, RX_BURST_LEVEL - 1);
+       dw_writel(dws, DW_SPI_DMATDLR, TX_BURST_LEVEL);
 
        if (xfer->tx_buf) {
                dma_ctrl |= SPI_DMA_TDMAE;