err = backtrack_insn(env, i, bt);
                        }
                        if (err == -ENOTSUPP) {
-                               mark_all_scalars_precise(env, st);
+                               mark_all_scalars_precise(env, env->cur_state);
                                bt_reset(bt);
                                return 0;
                        } else if (err) {
                                         * fp-8 and it's "unallocated" stack space.
                                         * In such case fallback to conservative.
                                         */
-                                       mark_all_scalars_precise(env, st);
+                                       mark_all_scalars_precise(env, env->cur_state);
                                        bt_reset(bt);
                                        return 0;
                                }
                }
 
                if (bt_empty(bt))
-                       break;
+                       return 0;
 
                last_idx = st->last_insn_idx;
                first_idx = st->first_insn_idx;
        }
+
+       /* if we still have requested precise regs or slots, we missed
+        * something (e.g., stack access through non-r10 register), so
+        * fallback to marking all precise
+        */
+       if (!bt_empty(bt)) {
+               mark_all_scalars_precise(env, env->cur_state);
+               bt_reset(bt);
+       }
+
        return 0;
 }
 
 
        mark_precise: frame0: regs=r4 stack= before 3\
        mark_precise: frame0: regs= stack=-8 before 2\
        mark_precise: frame0: falling back to forcing all scalars precise\
+       force_precise: frame0: forcing r0 to be precise\
        mark_precise: frame0: last_idx 5 first_idx 5\
-       mark_precise: frame0: parent state regs=r0 stack=:",
+       mark_precise: frame0: parent state regs= stack=:",
        .result = VERBOSE_ACCEPT,
        .retval = -1,
 },
        mark_precise: frame0: falling back to forcing all scalars precise\
        force_precise: frame0: forcing r0 to be precise\
        force_precise: frame0: forcing r0 to be precise\
+       force_precise: frame0: forcing r0 to be precise\
+       force_precise: frame0: forcing r0 to be precise\
        mark_precise: frame0: last_idx 6 first_idx 6\
-       mark_precise: frame0: parent state regs=r0 stack=:\
-       mark_precise: frame0: last_idx 5 first_idx 3\
-       mark_precise: frame0: regs=r0 stack= before 5",
+       mark_precise: frame0: parent state regs= stack=:",
        .result = VERBOSE_ACCEPT,
        .retval = -1,
 },