The PPM might take time to process a reset. Allow 20ms for the reset to
be processed before reading the CCI.
This should not slow down existing implementations because they would
not set any bits in the CCI after a reset, and would take a 20ms delay
to read the CCI anyway. This change makes the delay explicit, and
reduces a CCI read. Based on the spec, the PPM has 10ms to set busy, so,
20ms seems like a reasonable delay before we read the CCI.
Signed-off-by: Pavan Holla <pholla@chromium.org>
Reviewed-by: Prashant Malani <pmalani@chromium.org>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20240409-ucsi-reset-delay-v3-1-8440710b012b@chromium.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
goto out;
}
+ /* Give the PPM time to process a reset before reading CCI */
+ msleep(20);
+
ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci));
if (ret)
goto out;
goto out;
}
- msleep(20);
} while (!(cci & UCSI_CCI_RESET_COMPLETE));
out: