*/
        drm_gem_object_get(obj);
  
 -      if (obj->funcs && obj->funcs->mmap) {
+       vma->vm_private_data = obj;
+ 
 +      if (obj->funcs->mmap) {
                ret = obj->funcs->mmap(obj, vma);
                if (ret) {
                        drm_gem_object_put(obj);
 
        if (WARN_ON(dir == DMA_NONE))
                return ERR_PTR(-EINVAL);
  
 -      if (obj->funcs)
 -              sgt = obj->funcs->get_sg_table(obj);
 -      else
 -              sgt = obj->dev->driver->gem_prime_get_sg_table(obj);
 +      if (WARN_ON(!obj->funcs->get_sg_table))
 +              return ERR_PTR(-ENOSYS);
 +
 +      sgt = obj->funcs->get_sg_table(obj);
 +      if (IS_ERR(sgt))
 +              return sgt;
  
-       if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir,
-                             DMA_ATTR_SKIP_CPU_SYNC)) {
+       ret = dma_map_sgtable(attach->dev, sgt, dir,
+                             DMA_ATTR_SKIP_CPU_SYNC);
+       if (ret) {
                sg_free_table(sgt);
                kfree(sgt);
-               sgt = ERR_PTR(-ENOMEM);
+               sgt = ERR_PTR(ret);
        }
  
        return sgt;
 
  }
  
  static void dpu_crtc_disable(struct drm_crtc *crtc,
 -                           struct drm_crtc_state *old_crtc_state)
 +                           struct drm_atomic_state *state)
  {
-       struct dpu_crtc *dpu_crtc;
-       struct dpu_crtc_state *cstate;
 +      struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
 +                                                                            crtc);
+       struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
+       struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);
        struct drm_encoder *encoder;
        unsigned long flags;
        bool release_bandwidth = false;
  }
  
  static void dpu_crtc_enable(struct drm_crtc *crtc,
 -              struct drm_crtc_state *old_crtc_state)
 +              struct drm_atomic_state *state)
  {
-       struct dpu_crtc *dpu_crtc;
+       struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
        struct drm_encoder *encoder;
        bool request_bandwidth = false;
  
 
        struct virtio_gpu_transfer_host_3d *cmd_p;
        struct virtio_gpu_vbuffer *vbuf;
        bool use_dma_api = !virtio_has_dma_quirk(vgdev->vdev);
 -      struct virtio_gpu_object_shmem *shmem = to_virtio_gpu_shmem(bo);
  
 -      if (use_dma_api)
 +      if (virtio_gpu_is_shmem(bo) && use_dma_api) {
 +              struct virtio_gpu_object_shmem *shmem = to_virtio_gpu_shmem(bo);
- 
-               dma_sync_sg_for_device(vgdev->vdev->dev.parent,
-                                      shmem->pages->sgl, shmem->pages->nents,
-                                      DMA_TO_DEVICE);
+               dma_sync_sgtable_for_device(vgdev->vdev->dev.parent,
+                                           shmem->pages, DMA_TO_DEVICE);
 +      }
  
        cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
        memset(cmd_p, 0, sizeof(*cmd_p));
 
  #define DP_CEC_TX_MESSAGE_BUFFER               0x3020
  #define DP_CEC_MESSAGE_BUFFER_LENGTH             0x10
  
+ #define DP_PROTOCOL_CONVERTER_CONTROL_0               0x3050 /* DP 1.3 */
+ # define DP_HDMI_DVI_OUTPUT_CONFIG            (1 << 0) /* DP 1.3 */
+ #define DP_PROTOCOL_CONVERTER_CONTROL_1               0x3051 /* DP 1.3 */
+ # define DP_CONVERSION_TO_YCBCR420_ENABLE     (1 << 0) /* DP 1.3 */
+ # define DP_HDMI_EDID_PROCESSING_DISABLE      (1 << 1) /* DP 1.4 */
+ # define DP_HDMI_AUTONOMOUS_SCRAMBLING_DISABLE        (1 << 2) /* DP 1.4 */
+ # define DP_HDMI_FORCE_SCRAMBLING             (1 << 3) /* DP 1.4 */
+ #define DP_PROTOCOL_CONVERTER_CONTROL_2               0x3052 /* DP 1.3 */
+ # define DP_CONVERSION_TO_YCBCR422_ENABLE     (1 << 0) /* DP 1.3 */
+ 
 +/* HDCP 1.3 and HDCP 2.2 */
  #define DP_AUX_HDCP_BKSV              0x68000
  #define DP_AUX_HDCP_RI_PRIME          0x68005
  #define DP_AUX_HDCP_AKSV              0x68007