drm/xe: Introduce has_atomic_enable_pte_bit device info

Add has_atomic_enable_pte_bit to specify that a device
has PTE_AE bit in its PTE feild. Currently XE2 and PVC
supports this so set this for those two.

This will help consolidate setting atomic access bit in PTE
logic which is spread between multiple files.

Reviewed-by: Oak Zeng <oak.zeng@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430162529.21588-2-nirmoy.das@intel.com
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 0f68c55ea40516ea8178cac322e8ec53f8e7fe08..7cddb00f9c35b161fcc273dd4366ce0dd444ad1c 100644 (file)
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -281,6 +281,8 @@ struct xe_device {
                u8 has_heci_gscfi:1;
                /** @info.skip_guc_pc: Skip GuC based PM feature init */
                u8 skip_guc_pc:1;
+               /** @info.has_atomic_enable_pte_bit: Device has atomic enable PTE bit */
+               u8 has_atomic_enable_pte_bit:1;
 
 #if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
                struct {

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 27edf4fd8bb8c1b5611ff3e34512902c3167f529..c385f4ddf1633402b728889e2e909a8680e21845 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -146,6 +146,7 @@ static const struct xe_graphics_desc graphics_xehpc = {
        .vram_flags = XE_VRAM_FLAGS_NEED64K,
 
        .has_asid = 1,
+       .has_atomic_enable_pte_bit = 1,
        .has_flat_ccs = 0,
        .has_usm = 1,
 };
@@ -163,6 +164,7 @@ static const struct xe_graphics_desc graphics_xelpg = {
 #define XE2_GFX_FEATURES \
        .dma_mask_size = 46, \
        .has_asid = 1, \
+       .has_atomic_enable_pte_bit = 1, \
        .has_flat_ccs = 1, \
        .has_range_tlb_invalidation = 1, \
        .has_usm = 1, \
@@ -629,6 +631,7 @@ static int xe_info_init(struct xe_device *xe,
        xe->info.va_bits = graphics_desc->va_bits;
        xe->info.vm_max_level = graphics_desc->vm_max_level;
        xe->info.has_asid = graphics_desc->has_asid;
+       xe->info.has_atomic_enable_pte_bit = graphics_desc->has_atomic_enable_pte_bit;
        xe->info.has_flat_ccs = graphics_desc->has_flat_ccs;
        xe->info.has_range_tlb_invalidation = graphics_desc->has_range_tlb_invalidation;
        xe->info.has_usm = graphics_desc->has_usm;

diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index b1ad12fa22d655056062a29ed911ab42fdf44744..e1f2b4879fc2b0f209599203096bd5d1d4b0d371 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -25,6 +25,7 @@ struct xe_graphics_desc {
        u8 max_remote_tiles:2;
 
        u8 has_asid:1;
+       u8 has_atomic_enable_pte_bit:1;
        u8 has_flat_ccs:1;
        u8 has_range_tlb_invalidation:1;
        u8 has_usm:1;