amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
                amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
-               amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block);
+               if (!amdgpu_sriov_vf(adev))
+                       amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block);
+
                if (adev->enable_mes)
                        amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block);
                break;
                        AMD_PG_SUPPORT_JPEG |
                        AMD_PG_SUPPORT_ATHUB |
                        AMD_PG_SUPPORT_MMHUB;
+               if (amdgpu_sriov_vf(adev)) {
+                       /* hypervisor control CG and PG enablement */
+                       adev->cg_flags = 0;
+                       adev->pg_flags = 0;
+               }
                adev->external_rev_id = adev->rev_id + 0x28;
                break;
        default: