arm64: dts: ti: k3-am62a-main: Enable CSI2-RX

Add nodes for Cadence DPHY, CSI2RX and TI's pixel-grabbing wrapper.
AM62A uses a dedicated BCDMA instance for CSI-RX traffic, so enable
that as well.

Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20231201-csi_dts-v3-3-9f06f31080fe@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index ccd708b09acd64a640566b8336be35f980d58b9d..2338a92a4c9ffbca4876becf0dbec251b44f37bf 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -144,6 +144,44 @@
                };
        };
 
+       dmss_csi: bus@4e000000 {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               dma-ranges;
+               ranges = <0x00 0x4e000000 0x00 0x4e000000 0x00 0x300000>;
+
+               ti,sci-dev-id = <198>;
+
+               inta_main_dmss_csi: interrupt-controller@4e0a0000 {
+                       compatible = "ti,sci-inta";
+                       reg = <0x00 0x4e0a0000 0x00 0x8000>;
+                       #interrupt-cells = <0>;
+                       interrupt-controller;
+                       interrupt-parent = <&gic500>;
+                       msi-controller;
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <200>;
+                       ti,interrupt-ranges = <0 237 8>;
+                       ti,unmapped-event-sources = <&main_bcdma_csi>;
+                       power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+               };
+
+               main_bcdma_csi: dma-controller@4e230000 {
+                       compatible = "ti,am62a-dmss-bcdma-csirx";
+                       reg = <0x00 0x4e230000 0x00 0x100>,
+                             <0x00 0x4e180000 0x00 0x8000>,
+                             <0x00 0x4e100000 0x00 0x10000>;
+                       reg-names = "gcfg", "rchanrt", "ringrt";
+                       msi-parent = <&inta_main_dmss_csi>;
+                       #dma-cells = <3>;
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <199>;
+                       ti,sci-rm-range-rchan = <0x21>;
+                       power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+               };
+       };
+
        dmsc: system-controller@44043000 {
                compatible = "ti,k2g-sci";
                reg = <0x00 0x44043000 0x00 0xfe0>;
@@ -876,4 +914,65 @@
                power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
                status = "disabled";
        };
+
+       ti_csi2rx0: ticsi2rx@30102000 {
+               compatible = "ti,j721e-csi2rx-shim";
+               dmas = <&main_bcdma_csi 0 0x5000 0>;
+               dma-names = "rx0";
+               reg = <0x00 0x30102000 0x00 0x1000>;
+               power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               status = "disabled";
+
+               cdns_csi2rx0: csi-bridge@30101000 {
+                       compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+                       reg = <0x00 0x30101000 0x00 0x1000>;
+                       clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
+                               <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
+                       clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+                               "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+                       phys = <&dphy0>;
+                       phy-names = "dphy";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               csi0_port0: port@0 {
+                                       reg = <0>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port1: port@1 {
+                                       reg = <1>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port2: port@2 {
+                                       reg = <2>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port3: port@3 {
+                                       reg = <3>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port4: port@4 {
+                                       reg = <4>;
+                                       status = "disabled";
+                               };
+                       };
+               };
+       };
+
+       dphy0: phy@30110000 {
+               compatible = "cdns,dphy-rx";
+               reg = <0x00 0x30110000 0x00 0x1100>;
+               #phy-cells = <0>;
+               power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
+               status = "disabled";
+       };
 };