riscv: dts: allwinner: convert isa detection to new properties

Convert the D1 devicetrees to use the new properties
"riscv,isa-base" & "riscv,isa-extensions".
For compatibility with other projects, "riscv,isa" remains.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231009-moonlight-gray-92debdc89f30@wendy
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 0856f18dc3cfaede0162125d05ab12482f899a7d..64c3c2e6cbe02456515d1f5021dd65a4f79e653b 100644 (file)
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -25,6 +25,9 @@
                        mmu-type = "riscv,sv39";
                        operating-points-v2 = <&opp_table_cpu>;
                        riscv,isa = "rv64imafdc";
+                       riscv,isa-base = "rv64i";
+                       riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
+                                              "zifencei", "zihpm";
                        #cooling-cells = <2>;
 
                        cpu0_intc: interrupt-controller {