u32 fw_size = core->fw.mapped_mem_size;
        void __iomem *wrapper_base;
 
-       if (IS_V6(core))
+       if (IS_IRIS2_1(core))
                wrapper_base = core->wrapper_tz_base;
        else
                wrapper_base = core->wrapper_base;
        writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR);
        writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR);
 
-       if (IS_V6(core)) {
+       if (IS_IRIS2_1(core)) {
                /* Bring XTSS out of reset */
                writel(0, wrapper_base + WRAPPER_TZ_XTSS_SW_RESET);
        } else {
        if (resume) {
                venus_reset_cpu(core);
        } else {
-               if (IS_V6(core))
+               if (IS_IRIS2_1(core))
                        writel(WRAPPER_XTSS_SW_RESET_BIT,
                               core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
                else
        void __iomem *wrapper_base = core->wrapper_base;
        void __iomem *wrapper_tz_base = core->wrapper_tz_base;
 
-       if (IS_V6(core)) {
+       if (IS_IRIS2_1(core)) {
                /* Assert the reset to XTSS */
                reg = readl(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
                reg |= WRAPPER_XTSS_SW_RESET_BIT;