]> www.infradead.org Git - users/hch/configfs.git/commitdiff
drm/i915: pass dev_priv explicitly to ADL_TVIDEO_DIP_AS_SDP_DATA
authorJani Nikula <jani.nikula@intel.com>
Mon, 27 May 2024 11:10:53 +0000 (14:10 +0300)
committerJani Nikula <jani.nikula@intel.com>
Tue, 28 May 2024 07:58:19 +0000 (10:58 +0300)
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the ADL_TVIDEO_DIP_AS_SDP_DATA register macro.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/75a4f817f7c73277b2b8021275ccb9a4f3716953.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_hdmi.c
drivers/gpu/drm/i915/i915_reg.h

index 184fec37211bdf16372b9e18b09d395a02ce43bf..3767be0bdba859e6d3c13dcc27cf21e99d7e5704 100644 (file)
@@ -169,7 +169,7 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
        case DP_SDP_VSC:
                return HSW_TVIDEO_DIP_VSC_DATA(dev_priv, cpu_transcoder, i);
        case DP_SDP_ADAPTIVE_SYNC:
-               return ADL_TVIDEO_DIP_AS_SDP_DATA(cpu_transcoder, i);
+               return ADL_TVIDEO_DIP_AS_SDP_DATA(dev_priv, cpu_transcoder, i);
        case DP_SDP_PPS:
                return ICL_VIDEO_DIP_PPS_DATA(dev_priv, cpu_transcoder, i);
        case HDMI_INFOFRAME_TYPE_AVI:
index 57e805dcf4c6530435a1d030ed134a6ee55a7252..be57812a6b07d7c544670d1da38904e06edaa6b2 100644 (file)
 #define ICL_VIDEO_DIP_PPS_DATA(dev_priv, trans, i)     _MMIO_TRANS2(dev_priv, trans, _ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)
 #define ICL_VIDEO_DIP_PPS_ECC(dev_priv, trans, i)              _MMIO_TRANS2(dev_priv, trans, _ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)
 /*ADLP and later: */
-#define ADL_TVIDEO_DIP_AS_SDP_DATA(trans, i)   _MMIO_TRANS2(dev_priv, trans,\
+#define ADL_TVIDEO_DIP_AS_SDP_DATA(dev_priv, trans, i) _MMIO_TRANS2(dev_priv, trans,\
                                                             _ADL_VIDEO_DIP_AS_DATA_A + (i) * 4)
 
 #define _HSW_STEREO_3D_CTL_A           0x70020