pinctrl: mvebu: use correct MPP sel value for dev pins

The "dev" function is selected with the value 0x4 not 0x01.

Fixes: commit d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
index b854f1ee5de579b3fb4934de30ff0bf3272d2b9c..e732f3a1efb71a1329e815d862906d07a2e84562 100644 (file)
--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
@@ -437,34 +437,34 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
                 MPP_VAR_FUNCTION(0x4, "dev", "we0",         V_98DX3236_PLUS)),
        MPP_MODE(21,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad0",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad0",         V_98DX3236_PLUS)),
        MPP_MODE(22,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad1",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad1",         V_98DX3236_PLUS)),
        MPP_MODE(23,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad2",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad2",         V_98DX3236_PLUS)),
        MPP_MODE(24,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad3",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad3",         V_98DX3236_PLUS)),
        MPP_MODE(25,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad4",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad4",         V_98DX3236_PLUS)),
        MPP_MODE(26,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad5",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad5",         V_98DX3236_PLUS)),
        MPP_MODE(27,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad6",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad6",         V_98DX3236_PLUS)),
        MPP_MODE(28,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "ad7",         V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "ad7",         V_98DX3236_PLUS)),
        MPP_MODE(29,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "a0",          V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "a0",          V_98DX3236_PLUS)),
        MPP_MODE(30,
                 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-                MPP_VAR_FUNCTION(0x1, "dev", "a1",          V_98DX3236_PLUS)),
+                MPP_VAR_FUNCTION(0x4, "dev", "a1",          V_98DX3236_PLUS)),
        MPP_MODE(31,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
                 MPP_VAR_FUNCTION(0x1, "slv_smi", "mdc",     V_98DX3236_PLUS),