drm/i915: Enable 10bpc + CCS on TGL+

TGL+ support 10bpc compressed scanout. Enable it.

v2: Set .depth=30 for all variants to match drm_fourcc.c
    Set clear color block size to 0x0

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240918144445.5716-4-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 6c2679e6c9808dc1f2f581c4d58369187991a392..8ee9fef446c68c6d16855ab718dbe67ffee64bc0 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -67,6 +67,18 @@ static const struct drm_format_info gen12_ccs_formats[] = {
        { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
          .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
        { .format = DRM_FORMAT_YUYV, .num_planes = 2,
          .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
          .hsub = 2, .vsub = 1, .is_yuv = true },
@@ -113,6 +125,18 @@ static const struct drm_format_info gen12_ccs_cc_formats[] = {
        { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 3,
          .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 3,
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 3,
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 3,
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 3,
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
 };
 
 static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
@@ -128,6 +152,18 @@ static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
        { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
          .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, },
+       { .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
+       { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
+         .hsub = 1, .vsub = 1, .has_alpha = true },
 };
 
 struct intel_modifier_desc {

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 9207b7e96974a9af1595d7c1e0c94b6cca11e605..2a82fd6d2f89599ee148559c0c0e5b0598a726f5 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2343,6 +2343,10 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
        case DRM_FORMAT_XBGR8888:
        case DRM_FORMAT_ARGB8888:
        case DRM_FORMAT_ABGR8888:
+       case DRM_FORMAT_XRGB2101010:
+       case DRM_FORMAT_XBGR2101010:
+       case DRM_FORMAT_ARGB2101010:
+       case DRM_FORMAT_ABGR2101010:
                if (intel_fb_is_ccs_modifier(modifier))
                        return true;
                fallthrough;
@@ -2359,10 +2363,6 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
                        return true;
                fallthrough;
        case DRM_FORMAT_RGB565:
-       case DRM_FORMAT_XRGB2101010:
-       case DRM_FORMAT_XBGR2101010:
-       case DRM_FORMAT_ARGB2101010:
-       case DRM_FORMAT_ABGR2101010:
        case DRM_FORMAT_XVYU2101010:
        case DRM_FORMAT_C8:
        case DRM_FORMAT_XBGR16161616F: