arm64: dts: qcom: sdx75: Add QPIC NAND support

Add devicetree node to enable support for QPIC NAND controller on Qualcomm
SDX75 platform.

Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250415072756.20046-5-quic_kaushalk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 9b89ed6d118125c2e76e4c3d222f2fe99b67703c..75bfc19f412c8f8b6c10aa858004dd3ddef86672 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -894,6 +894,25 @@
                        status = "disabled";
                };
 
+               qpic_nand: nand-controller@1cc8000 {
+                       compatible = "qcom,sdx75-nand", "qcom,sdx55-nand";
+                       reg = <0x0 0x01cc8000 0x0 0x10000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       clocks = <&rpmhcc RPMH_QPIC_CLK>,
+                                <&sleep_clk>;
+                       clock-names = "core",
+                                     "aon";
+                       dmas = <&qpic_bam 0>,
+                              <&qpic_bam 1>,
+                              <&qpic_bam 2>;
+                       dma-names = "tx",
+                                   "rx",
+                                   "cmd";
+                       iommus = <&apps_smmu 0x100 0x3>;
+                       status = "disabled";
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0x0 0x01f40000 0x0 0x40000>;