]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: renesas: r8a779g0: Add ISP core function block
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Wed, 23 Apr 2025 16:31:09 +0000 (18:31 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 24 Apr 2025 09:29:09 +0000 (11:29 +0200)
All ISP instances on V4H have both a channel select and core function
block, describe the core region in addition to the existing cs region.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250423163113.2961049-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a779g0.dtsi

index 1760720b71287043778d8988212165e7e5e69f90..6dbf05a559357170984295af6190266881d12f86 100644 (file)
                isp0: isp@fed00000 {
                        compatible = "renesas,r8a779g0-isp",
                                     "renesas,rcar-gen4-isp";
-                       reg = <0 0xfed00000 0 0x10000>;
-                       interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
-                       clocks = <&cpg CPG_MOD 612>;
+                       reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>;
+                       reg-names = "cs", "core";
+                       interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "cs", "core";
+                       clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>;
+                       clock-names = "cs", "core";
                        power-domains = <&sysc R8A779G0_PD_A3ISP0>;
-                       resets = <&cpg 612>;
+                       resets = <&cpg 612>, <&cpg 16>;
+                       reset-names = "cs", "core";
                        status = "disabled";
 
+                       renesas,vspx = <&vspx0>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                isp1: isp@fed20000 {
                        compatible = "renesas,r8a779g0-isp",
                                     "renesas,rcar-gen4-isp";
-                       reg = <0 0xfed20000 0 0x10000>;
-                       interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
-                       clocks = <&cpg CPG_MOD 613>;
+                       reg = <0 0xfed20000 0 0x10000>, <0 0xfee00000 0 0x100000>;
+                       reg-names = "cs", "core";
+                       interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "cs", "core";
+                       clocks = <&cpg CPG_MOD 613>, <&cpg CPG_MOD 17>;
+                       clock-names = "cs", "core";
                        power-domains = <&sysc R8A779G0_PD_A3ISP1>;
-                       resets = <&cpg 613>;
+                       resets = <&cpg 613>, <&cpg 17>;
+                       reset-names = "cs", "core";
                        status = "disabled";
 
+                       renesas,vspx = <&vspx1>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;