#define RD_REG_BYTE_RELAXED(addr)      readb_relaxed(addr)
 #define RD_REG_WORD_RELAXED(addr)      readw_relaxed(addr)
 #define RD_REG_DWORD_RELAXED(addr)     readl_relaxed(addr)
-#define WRT_REG_BYTE(addr, data)       writeb(data,addr)
-#define WRT_REG_WORD(addr, data)       writew(data,addr)
-#define WRT_REG_DWORD(addr, data)      writel(data,addr)
+#define WRT_REG_BYTE(addr, data)       writeb(data, addr)
+#define WRT_REG_WORD(addr, data)       writew(data, addr)
+#define WRT_REG_DWORD(addr, data)      writel(data, addr)
 
 /*
  * ISP83XX specific remote register addresses
  * 133Mhz slot.
  */
 #define RD_REG_WORD_PIO(addr)          (inw((unsigned long)addr))
-#define WRT_REG_WORD_PIO(addr, data)   (outw(data,(unsigned long)addr))
+#define WRT_REG_WORD_PIO(addr, data)   (outw(data, (unsigned long)addr))
 
 /*
  * Fibre Channel device definitions.
 
        /* NVRAM configuration data */
 #define MAX_NVRAM_SIZE  4096
-#define VPD_OFFSET      MAX_NVRAM_SIZE / 2
+#define VPD_OFFSET      (MAX_NVRAM_SIZE / 2)
        uint16_t        nvram_size;
        uint16_t        nvram_base;
        void            *nvram;
 
            "%s %8phN. rport %p is %s mode\n",
            __func__, fcport->port_name, rport,
            (fcport->port_type == FCT_TARGET) ? "tgt" :
-           ((fcport->port_type & FCT_NVME) ? "nvme" :"ini"));
+           ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
 
        fc_remote_port_rolechg(rport, rport_ids.roles);
 }
 
        cur_dsd++;
        return 0;
 }
+
 /**
  * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  *                                                     Type 6 IOCB types.
 
        schedule_work(&priv->abort_work);
 }
 
-
 static int qla_nvme_ls_req(struct nvme_fc_local_port *lport,
     struct nvme_fc_remote_port *rport, struct nvmefc_ls_req *fd)
 {
 
 }
 
 /* ISR related functions */
-static struct qla82xx_legacy_intr_set legacy_intr[] = \
+static struct qla82xx_legacy_intr_set legacy_intr[] =
        QLA82XX_LEGACY_INTR_CONFIG;
 
 /*
                case QLA8XXX_DEV_NEED_QUIESCENT:
                        qla82xx_need_qsnt_handler(vha);
                        /* Reset timeout value after quiescence handler */
-                       dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\
+                       dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout
                                                         * HZ);
                        break;
                case QLA8XXX_DEV_QUIESCENT:
                        qla82xx_idc_lock(ha);
 
                        /* Reset timeout value after quiescence handler */
-                       dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\
+                       dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout
                                                         * HZ);
                        break;
                case QLA8XXX_DEV_FAILED:
                goto md_failed;
        }
 
-       entry_hdr = (qla82xx_md_entry_hdr_t *) \
+       entry_hdr = (qla82xx_md_entry_hdr_t *)
            (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
 
        /* Walk through the entry headers */
                data_collected = (uint8_t *)data_ptr -
                    (uint8_t *)ha->md_dump;
 skip_nxt_entry:
-               entry_hdr = (qla82xx_md_entry_hdr_t *) \
+               entry_hdr = (qla82xx_md_entry_hdr_t *)
                    (((uint8_t *)entry_hdr) + entry_hdr->entry_size);
        }
 
 
 #define QLA82XX_ADDR_QDR_NET           (0x0000000300000000ULL)
 #define QLA82XX_P3_ADDR_QDR_NET_MAX    (0x0000000303ffffffULL)
 
-#define QLA82XX_PCI_CRBSPACE           (unsigned long)0x06000000
-#define QLA82XX_PCI_DIRECT_CRB         (unsigned long)0x04400000
-#define QLA82XX_PCI_CAMQM              (unsigned long)0x04800000
-#define QLA82XX_PCI_CAMQM_MAX          (unsigned long)0x04ffffff
-#define QLA82XX_PCI_DDR_NET            (unsigned long)0x00000000
-#define QLA82XX_PCI_QDR_NET            (unsigned long)0x04000000
-#define QLA82XX_PCI_QDR_NET_MAX                (unsigned long)0x043fffff
+#define QLA82XX_PCI_CRBSPACE           0x06000000UL
+#define QLA82XX_PCI_DIRECT_CRB         0x04400000UL
+#define QLA82XX_PCI_CAMQM              0x04800000UL
+#define QLA82XX_PCI_CAMQM_MAX          0x04ffffffUL
+#define QLA82XX_PCI_DDR_NET            0x00000000UL
+#define QLA82XX_PCI_QDR_NET            0x04000000UL
+#define QLA82XX_PCI_QDR_NET_MAX                0x043fffffUL
 
 /*
  *   Register offsets for MN
 
                "a Fabric scan.  This is needed for several broken switches. "
                "Default is 0 - no PLOGI. 1 - perform PLOGI.");
 
-int ql2xloginretrycount = 0;
+int ql2xloginretrycount;
 module_param(ql2xloginretrycount, int, S_IRUGO);
 MODULE_PARM_DESC(ql2xloginretrycount,
                "Specify an alternate value for the NVRAM login retry count.");
                "0 - MiniDump disabled. "
                "1 (Default) - MiniDump enabled.");
 
-int ql2xexlogins = 0;
+int ql2xexlogins;
 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 MODULE_PARM_DESC(ql2xexlogins,
                 "Number of extended Logins. "
 MODULE_PARM_DESC(ql2xiniexchg,
        "Number of initiator exchanges.");
 
-int ql2xfwholdabts = 0;
+int ql2xfwholdabts;
 module_param(ql2xfwholdabts, int, S_IRUGO);
 MODULE_PARM_DESC(ql2xfwholdabts,
                "Allow FW to hold status IOCB until ABTS rsp received. "