According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. This fixes an issue seen on ODROID-C2 where the Ethernet
link doesn't come up when using ip link set down/up:
  [ 6630.714855] meson8b-dwmac 
c9410000.ethernet eth0: Link is Down
  [ 6630.785775] meson8b-dwmac 
c9410000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=36)
  [ 6630.893071] meson8b-dwmac 
c9410000.ethernet: Failed to reset the dma
  [ 6630.893800] meson8b-dwmac 
c9410000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
  [ 6630.902835] meson8b-dwmac 
c9410000.ethernet eth0: stmmac_open: Hw setup failed
Fixes: f29cabf240ed ("arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/4a322c198b86e4c8b3dda015560a683babea4d63.1607363522.git.stefan@agner.ch
 
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
 
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
 
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
 
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
 
 
                /* External PHY reset is shared with internal PHY Led signal */
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
 
                reg = <0>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
 
                max-speed = <1000>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
        };
 };
 
 
                /* External PHY reset is shared with internal PHY Led signal */
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
 
                max-speed = <1000>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
        };
 };