[ARM] Kirkwood: create a mapping for the Security Accelerator SRAM

Always creating the physical mapping should do no harm, so let's remove
the interface that was provided for its optional creation and make the
mapping static.

Signed-off-by: Nicolas Pitre <nico@marvell.com>

diff --git a/arch/arm/include/asm/sizes.h b/arch/arm/include/asm/sizes.h
index ada93a8fc2ef6ed426cf5ac61ba27b3926ee402e..4fc1565e4f930860722bca331330d0606e494d1c 100644 (file)
--- a/arch/arm/include/asm/sizes.h
+++ b/arch/arm/include/asm/sizes.h
@@ -29,6 +29,7 @@
 #define SZ_512                         0x00000200
 
 #define SZ_1K                           0x00000400
+#define SZ_2K                           0x00000800
 #define SZ_4K                           0x00001000
 #define SZ_8K                           0x00002000
 #define SZ_16K                          0x00004000

diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 5db4f0bbe5ee2c020320b4ef4bf09826e2d1521e..1da5d1c18ecbbcb4bc5488bc60cea453c0f04d6b 100644 (file)
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -20,6 +20,7 @@
  */
 #define TARGET_DDR             0
 #define TARGET_DEV_BUS         1
+#define TARGET_SRAM            3
 #define TARGET_PCIE            4
 #define ATTR_DEV_SPI_ROM       0x1e
 #define ATTR_DEV_BOOT          0x1d
@@ -30,6 +31,7 @@
 #define ATTR_DEV_CS0           0x3e
 #define ATTR_PCIE_IO           0xe0
 #define ATTR_PCIE_MEM          0xe8
+#define ATTR_SRAM              0x01
 
 /*
  * Helpers to get DDR bank info
@@ -48,7 +50,6 @@
 
 
 struct mbus_dram_target_info kirkwood_mbus_dram_info;
-static int __initdata win_alloc_count;
 
 static int __init cpu_win_can_remap(int win)
 {
@@ -112,7 +113,11 @@ void __init kirkwood_setup_cpu_mbus(void)
        setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
                      TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
 
-       win_alloc_count = 3;
+       /*
+        * Setup window for SRAM.
+        */
+       setup_cpu_win(3, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
+                     TARGET_SRAM, ATTR_SRAM, -1);
 
        /*
         * Setup MBUS dram target info.
@@ -140,8 +145,3 @@ void __init kirkwood_setup_cpu_mbus(void)
        }
        kirkwood_mbus_dram_info.num_cs = cs;
 }
-
-void __init kirkwood_setup_sram_win(u32 base, u32 size)
-{
-       setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1);
-}

diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 9de525664bb30eccd1de16d5b7aa0072ccc1f317..d7de43464358de708078d1650422ecd044045ee0 100644 (file)
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -26,7 +26,6 @@ void kirkwood_init_irq(void);
 
 extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
 void kirkwood_setup_cpu_mbus(void);
-void kirkwood_setup_sram_win(u32 base, u32 size);
 
 void kirkwood_pcie_id(u32 *dev, u32 *rev);
 

diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 00be8c524f06a1b19022e2d1a38a07ad969b0f4f..2172224d7e2dae2fc95438198dce0c0302c1ec5b 100644 (file)
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -20,12 +20,16 @@
  * f1000000    on-chip peripheral registers
  * f2000000    PCIe I/O space
  * f3000000    NAND controller address window
+ * f4000000    Security Accelerator SRAM
  *
  * virt                phys            size
  * fee00000    f1000000        1M      on-chip peripheral registers
  * fef00000    f2000000        1M      PCIe I/O space
  */
 
+#define KIRKWOOD_SRAM_PHYS_BASE                0xf4000000
+#define KIRKWOOD_SRAM_SIZE             SZ_2K
+
 #define KIRKWOOD_NAND_MEM_PHYS_BASE    0xf3000000
 #define KIRKWOOD_NAND_MEM_SIZE         SZ_1K