Minor overlapping changes in the conflicts.
In the macsec case, the change of the default ID macro
name overlapped with the 64-bit netlink attribute alignment
fixes in net-next.
Signed-off-by: David S. Miller <davem@davemloft.net>
        return err;
  }
  
 +static int mlx5e_handle_feature(struct net_device *netdev,
 +                              netdev_features_t wanted_features,
 +                              netdev_features_t feature,
 +                              mlx5e_feature_handler feature_handler)
 +{
 +      netdev_features_t changes = wanted_features ^ netdev->features;
 +      bool enable = !!(wanted_features & feature);
 +      int err;
 +
 +      if (!(changes & feature))
 +              return 0;
 +
 +      err = feature_handler(netdev, enable);
 +      if (err) {
 +              netdev_err(netdev, "%s feature 0x%llx failed err %d\n",
 +                         enable ? "Enable" : "Disable", feature, err);
 +              return err;
 +      }
 +
 +      MLX5E_SET_FEATURE(netdev, feature, enable);
 +      return 0;
 +}
 +
 +static int mlx5e_set_features(struct net_device *netdev,
 +                            netdev_features_t features)
 +{
 +      int err;
 +
 +      err  = mlx5e_handle_feature(netdev, features, NETIF_F_LRO,
 +                                  set_feature_lro);
 +      err |= mlx5e_handle_feature(netdev, features,
 +                                  NETIF_F_HW_VLAN_CTAG_FILTER,
 +                                  set_feature_vlan_filter);
 +      err |= mlx5e_handle_feature(netdev, features, NETIF_F_HW_TC,
 +                                  set_feature_tc_num_filters);
 +      err |= mlx5e_handle_feature(netdev, features, NETIF_F_RXALL,
 +                                  set_feature_rx_all);
 +      err |= mlx5e_handle_feature(netdev, features, NETIF_F_HW_VLAN_CTAG_RX,
 +                                  set_feature_rx_vlan);
 +
 +      return err ? -EINVAL : 0;
 +}
 +
+ #define MXL5_HW_MIN_MTU 64
+ #define MXL5E_MIN_MTU (MXL5_HW_MIN_MTU + ETH_FCS_LEN)
+ 
  static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu)
  {
        struct mlx5e_priv *priv = netdev_priv(netdev);
        schedule_work(&priv->set_rx_mode_work);
        mlx5e_disable_async_events(priv);
        flush_scheduled_work();
-       unregister_netdev(netdev);
+       if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) {
+               netif_device_detach(netdev);
+               mutex_lock(&priv->state_lock);
+               if (test_bit(MLX5E_STATE_OPENED, &priv->state))
+                       mlx5e_close_locked(netdev);
+               mutex_unlock(&priv->state_lock);
+       } else {
+               unregister_netdev(netdev);
+       }
+ 
        mlx5e_tc_cleanup(priv);
        mlx5e_vxlan_cleanup(priv);
 +      mlx5e_destroy_q_counter(priv);
        mlx5e_destroy_flow_tables(priv);
        mlx5e_destroy_tirs(priv);
        mlx5e_destroy_rqt(priv, MLX5E_SINGLE_RQ_RQT);
 
                return ret;
        }
  
 -      ret = socfpga_dwmac_setup(dwmac);
 -      if (ret) {
 -              dev_err(dev, "couldn't setup SoC glue (%d)\n", ret);
 -              return ret;
 -      }
 -
        plat_dat->bsp_priv = dwmac;
        plat_dat->init = socfpga_dwmac_init;
-       plat_dat->exit = socfpga_dwmac_exit;
        plat_dat->fix_mac_speed = socfpga_dwmac_fix_mac_speed;
  
-       ret = socfpga_dwmac_init(pdev, plat_dat->bsp_priv);
-       if (ret)
-               return ret;
+       ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+       if (!ret)
+               ret = socfpga_dwmac_init(pdev, dwmac);
  
-       return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+       return ret;
  }
  
  static const struct of_device_id socfpga_dwmac_match[] = {
 
        if (!secy_nest)
                return 1;
  
 -      if (nla_put_sci(skb, MACSEC_SECY_ATTR_SCI, secy->sci) ||
 -          nla_put_u64(skb, MACSEC_SECY_ATTR_CIPHER_SUITE,
 -                      MACSEC_DEFAULT_CIPHER_ID) ||
 +      if (nla_put_sci(skb, MACSEC_SECY_ATTR_SCI, secy->sci,
 +                      MACSEC_SECY_ATTR_PAD) ||
 +          nla_put_u64_64bit(skb, MACSEC_SECY_ATTR_CIPHER_SUITE,
-                             DEFAULT_CIPHER_ID,
++                            MACSEC_DEFAULT_CIPHER_ID,
 +                            MACSEC_SECY_ATTR_PAD) ||
            nla_put_u8(skb, MACSEC_SECY_ATTR_ICV_LEN, secy->icv_len) ||
            nla_put_u8(skb, MACSEC_SECY_ATTR_OPER, secy->operational) ||
            nla_put_u8(skb, MACSEC_SECY_ATTR_PROTECT, secy->protect_frames) ||
        struct macsec_secy *secy = &macsec_priv(dev)->secy;
        struct macsec_tx_sc *tx_sc = &secy->tx_sc;
  
 -      if (nla_put_sci(skb, IFLA_MACSEC_SCI, secy->sci) ||
 +      if (nla_put_sci(skb, IFLA_MACSEC_SCI, secy->sci,
 +                      IFLA_MACSEC_PAD) ||
            nla_put_u8(skb, IFLA_MACSEC_ICV_LEN, secy->icv_len) ||
 -          nla_put_u64(skb, IFLA_MACSEC_CIPHER_SUITE,
 -                      MACSEC_DEFAULT_CIPHER_ID) ||
 +          nla_put_u64_64bit(skb, IFLA_MACSEC_CIPHER_SUITE,
-                             DEFAULT_CIPHER_ID, IFLA_MACSEC_PAD) ||
++                            MACSEC_DEFAULT_CIPHER_ID, IFLA_MACSEC_PAD) ||
            nla_put_u8(skb, IFLA_MACSEC_ENCODING_SA, tx_sc->encoding_sa) ||
            nla_put_u8(skb, IFLA_MACSEC_ENCRYPT, tx_sc->encrypt) ||
            nla_put_u8(skb, IFLA_MACSEC_PROTECT, secy->protect_frames) ||
 
                               enum mlx5_port_status status);
  int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
                                 enum mlx5_port_status *status);
 +int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
  
- int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port);
- void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, int *max_mtu, u8 port);
- void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, int *oper_mtu,
+ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
+ void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
+ void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
                              u8 port);
  
  int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,