RDMA/bnxt_re: Query firmware defaults of CC params during probe

Added function to query firmware default values of CC parameters
during driver init. These values will be stored in driver local
structure and used in subsequent patch.

Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Link: https://patch.msgid.link/20250107024553.2926983-4-kalesh-anakkur.purayil@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

diff --git a/drivers/infiniband/hw/bnxt_re/bnxt_re.h b/drivers/infiniband/hw/bnxt_re/bnxt_re.h
index 018386295bcd59d63dda126427d688f8a0fb3de7..f40aca550328b1535758338ce4c879c92db99b26 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/bnxt_re.h
+++ b/drivers/infiniband/hw/bnxt_re/bnxt_re.h
@@ -230,6 +230,7 @@ struct bnxt_re_dev {
        struct dentry                   *dbg_root;
        struct dentry                   *qp_debugfs;
        unsigned long                   event_bitmap;
+       struct bnxt_qplib_cc_param      cc_param;
 };
 
 #define to_bnxt_re_dev(ptr, member)    \

diff --git a/drivers/infiniband/hw/bnxt_re/main.c b/drivers/infiniband/hw/bnxt_re/main.c
index 54dee0f5dd3f564be139026082e687ff4dd3d252..87ff6d87401505c05dba30c62da316105ee14093 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/main.c
+++ b/drivers/infiniband/hw/bnxt_re/main.c
@@ -2096,6 +2096,11 @@ static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 op_type)
        set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
 
        if (!rdev->is_virtfn) {
+               /* Query f/w defaults of CC params */
+               rc = bnxt_qplib_query_cc_param(&rdev->qplib_res, &rdev->cc_param);
+               if (rc)
+                       ibdev_warn(&rdev->ibdev, "Failed to query CC defaults\n");
+
                rc = bnxt_re_setup_qos(rdev);
                if (rc)
                        ibdev_info(&rdev->ibdev,

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_sp.c b/drivers/infiniband/hw/bnxt_re/qplib_sp.c
index 7e20ae3d2c4fe1965be04f658d0741ad25c9cf98..d56cc3330d1bcba20a76d8cd475bbcf1d8176fda 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_sp.c
+++ b/drivers/infiniband/hw/bnxt_re/qplib_sp.c
@@ -1016,3 +1016,116 @@ free_mem:
        dma_free_coherent(&rcfw->pdev->dev, sbuf.size, sbuf.sb, sbuf.dma_addr);
        return rc;
 }
+
+static void bnxt_qplib_read_cc_gen1(struct bnxt_qplib_cc_param_ext *cc_ext,
+                                   struct creq_query_roce_cc_gen1_resp_sb_tlv *sb)
+{
+       cc_ext->inact_th_hi = le16_to_cpu(sb->inactivity_th_hi);
+       cc_ext->min_delta_cnp = le16_to_cpu(sb->min_time_between_cnps);
+       cc_ext->init_cp = le16_to_cpu(sb->init_cp);
+       cc_ext->tr_update_mode = sb->tr_update_mode;
+       cc_ext->tr_update_cyls = sb->tr_update_cycles;
+       cc_ext->fr_rtt = sb->fr_num_rtts;
+       cc_ext->ai_rate_incr = sb->ai_rate_increase;
+       cc_ext->rr_rtt_th = le16_to_cpu(sb->reduction_relax_rtts_th);
+       cc_ext->ar_cr_th = le16_to_cpu(sb->additional_relax_cr_th);
+       cc_ext->cr_min_th = le16_to_cpu(sb->cr_min_th);
+       cc_ext->bw_avg_weight = sb->bw_avg_weight;
+       cc_ext->cr_factor = sb->actual_cr_factor;
+       cc_ext->cr_th_max_cp = le16_to_cpu(sb->max_cp_cr_th);
+       cc_ext->cp_bias_en = sb->cp_bias_en;
+       cc_ext->cp_bias = sb->cp_bias;
+       cc_ext->cnp_ecn = sb->cnp_ecn;
+       cc_ext->rtt_jitter_en = sb->rtt_jitter_en;
+       cc_ext->bytes_per_usec = le16_to_cpu(sb->link_bytes_per_usec);
+       cc_ext->cc_cr_reset_th = le16_to_cpu(sb->reset_cc_cr_th);
+       cc_ext->cr_width = sb->cr_width;
+       cc_ext->min_quota = sb->quota_period_min;
+       cc_ext->max_quota = sb->quota_period_max;
+       cc_ext->abs_max_quota = sb->quota_period_abs_max;
+       cc_ext->tr_lb = le16_to_cpu(sb->tr_lower_bound);
+       cc_ext->cr_prob_fac = sb->cr_prob_factor;
+       cc_ext->tr_prob_fac = sb->tr_prob_factor;
+       cc_ext->fair_cr_th = le16_to_cpu(sb->fairness_cr_th);
+       cc_ext->red_div = sb->red_div;
+       cc_ext->cnp_ratio_th = sb->cnp_ratio_th;
+       cc_ext->ai_ext_rtt = le16_to_cpu(sb->exp_ai_rtts);
+       cc_ext->exp_crcp_ratio = sb->exp_ai_cr_cp_ratio;
+       cc_ext->low_rate_en = sb->use_rate_table;
+       cc_ext->cpcr_update_th = le16_to_cpu(sb->cp_exp_update_th);
+       cc_ext->ai_rtt_th1 = le16_to_cpu(sb->high_exp_ai_rtts_th1);
+       cc_ext->ai_rtt_th2 = le16_to_cpu(sb->high_exp_ai_rtts_th2);
+       cc_ext->cf_rtt_th = le16_to_cpu(sb->actual_cr_cong_free_rtts_th);
+       cc_ext->sc_cr_th1 = le16_to_cpu(sb->severe_cong_cr_th1);
+       cc_ext->sc_cr_th2 = le16_to_cpu(sb->severe_cong_cr_th2);
+       cc_ext->l64B_per_rtt = le32_to_cpu(sb->link64B_per_rtt);
+       cc_ext->cc_ack_bytes = sb->cc_ack_bytes;
+       cc_ext->reduce_cf_rtt_th = le16_to_cpu(sb->reduce_init_cong_free_rtts_th);
+}
+
+int bnxt_qplib_query_cc_param(struct bnxt_qplib_res *res,
+                             struct bnxt_qplib_cc_param *cc_param)
+{
+       struct bnxt_qplib_tlv_query_rcc_sb *ext_sb;
+       struct bnxt_qplib_rcfw *rcfw = res->rcfw;
+       struct creq_query_roce_cc_resp resp = {};
+       struct creq_query_roce_cc_resp_sb *sb;
+       struct bnxt_qplib_cmdqmsg msg = {};
+       struct cmdq_query_roce_cc req = {};
+       struct bnxt_qplib_rcfw_sbuf sbuf;
+       size_t resp_size;
+       int rc;
+
+       /* Query the parameters from chip */
+       bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, CMDQ_BASE_OPCODE_QUERY_ROCE_CC,
+                                sizeof(req));
+       if (bnxt_qplib_is_chip_gen_p5_p7(res->cctx))
+               resp_size = sizeof(*ext_sb);
+       else
+               resp_size = sizeof(*sb);
+
+       sbuf.size = ALIGN(resp_size, BNXT_QPLIB_CMDQE_UNITS);
+       sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
+                                    &sbuf.dma_addr, GFP_KERNEL);
+       if (!sbuf.sb)
+               return -ENOMEM;
+
+       req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
+       bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
+                               sizeof(resp), 0);
+       rc = bnxt_qplib_rcfw_send_message(res->rcfw, &msg);
+       if (rc)
+               goto out;
+
+       ext_sb = sbuf.sb;
+       sb = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ? &ext_sb->base_sb :
+               (struct creq_query_roce_cc_resp_sb *)ext_sb;
+
+       cc_param->enable = sb->enable_cc & CREQ_QUERY_ROCE_CC_RESP_SB_ENABLE_CC;
+       cc_param->tos_ecn = (sb->tos_dscp_tos_ecn &
+                            CREQ_QUERY_ROCE_CC_RESP_SB_TOS_ECN_MASK) >>
+                           CREQ_QUERY_ROCE_CC_RESP_SB_TOS_ECN_SFT;
+       cc_param->tos_dscp = (sb->tos_dscp_tos_ecn &
+                             CREQ_QUERY_ROCE_CC_RESP_SB_TOS_DSCP_MASK) >>
+                            CREQ_QUERY_ROCE_CC_RESP_SB_TOS_DSCP_SFT;
+       cc_param->alt_tos_dscp = sb->alt_tos_dscp;
+       cc_param->alt_vlan_pcp = sb->alt_vlan_pcp;
+
+       cc_param->g = sb->g;
+       cc_param->nph_per_state = sb->num_phases_per_state;
+       cc_param->init_cr = le16_to_cpu(sb->init_cr);
+       cc_param->init_tr = le16_to_cpu(sb->init_tr);
+       cc_param->cc_mode = sb->cc_mode;
+       cc_param->inact_th = le16_to_cpu(sb->inactivity_th);
+       cc_param->rtt = le16_to_cpu(sb->rtt);
+       cc_param->tcp_cp = le16_to_cpu(sb->tcp_cp);
+       cc_param->time_pph = sb->time_per_phase;
+       cc_param->pkts_pph = sb->pkts_per_phase;
+       if (bnxt_qplib_is_chip_gen_p5_p7(res->cctx)) {
+               bnxt_qplib_read_cc_gen1(&cc_param->cc_ext, &ext_sb->gen1_sb);
+               cc_param->inact_th |= (cc_param->cc_ext.inact_th_hi & 0x3F) << 16;
+       }
+out:
+       dma_free_coherent(&rcfw->pdev->dev, sbuf.size, sbuf.sb, sbuf.dma_addr);
+       return rc;
+}

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_sp.h b/drivers/infiniband/hw/bnxt_re/qplib_sp.h
index e6beeb514b7dd8bc859a2f14e91c6a1965c6e074..debb260801439126e64cabeaf65a11a87e272144 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_sp.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_sp.h
@@ -355,6 +355,8 @@ int bnxt_qplib_modify_cc(struct bnxt_qplib_res *res,
                         struct bnxt_qplib_cc_param *cc_param);
 int bnxt_qplib_read_context(struct bnxt_qplib_rcfw *rcfw, u8 type, u32 xid,
                            u32 resp_size, void *resp_va);
+int bnxt_qplib_query_cc_param(struct bnxt_qplib_res *res,
+                             struct bnxt_qplib_cc_param *cc_param);
 
 #define BNXT_VAR_MAX_WQE       4352
 #define BNXT_VAR_MAX_SLOT_ALIGN 256