clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling

[ Upstream commit ace342097768e35fd41934285604fa97da1e235a ]

On SoCs with Standby Control Registers (STBCRs) instead of Module Stop
Control Registers (MSTPCRs), the suspend handler saves the wrong
registers, and the resume handler prints the wrong register in an error
message.

Fortunately this cannot happen yet, as the suspend/resume code is used
on PSCI systems only, and systems with STBCRs (RZ/A1 and RZ/A2) do not
use PSCI.  Still, it is better to fix this, to avoid this becoming a
problem in the future.

Distinguish between STBCRs and MSTPCRs where needed.  Replace the
useless printing of the virtual register address in the resume error
message by printing the register index.

Fixes: fde35c9c7db5732c ("clk: renesas: cpg-mssr: Add R7S9210 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200507074713.30113-1-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index a2663fbbd7a510679a7b831fea00d0ec5e5bdaf8..d6a53c99b114a7187769716a4bf2e50b3b834e4c 100644 (file)
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -812,7 +812,8 @@ static int cpg_mssr_suspend_noirq(struct device *dev)
        /* Save module registers with bits under our control */
        for (reg = 0; reg < ARRAY_SIZE(priv->smstpcr_saved); reg++) {
                if (priv->smstpcr_saved[reg].mask)
-                       priv->smstpcr_saved[reg].val =
+                       priv->smstpcr_saved[reg].val = priv->stbyctrl ?
+                               readb(priv->base + STBCR(reg)) :
                                readl(priv->base + SMSTPCR(reg));
        }
 
@@ -872,8 +873,9 @@ static int cpg_mssr_resume_noirq(struct device *dev)
                }
 
                if (!i)
-                       dev_warn(dev, "Failed to enable SMSTP %p[0x%x]\n",
-                                priv->base + SMSTPCR(reg), oldval & mask);
+                       dev_warn(dev, "Failed to enable %s%u[0x%x]\n",
+                                priv->stbyctrl ? "STB" : "SMSTP", reg,
+                                oldval & mask);
        }
 
        return 0;