drm/i915: pass dev_priv explicitly to PORT_DFT2_G4X

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PORT_DFT2_G4X register macro.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0db8ee7b66b9660fc9fd80598257c6d36f0f506b.1714990089.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 35c3dd1130ce6dcccd82fdbd4de907eb9313deb2..b3dcfee6ec0e81946bdfe39c65c6f9d0b5c22975 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -167,7 +167,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
         *   - DisplayPort scrambling: used for EMI reduction
         */
        if (need_stable_symbols) {
-               u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X);
+               u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X(dev_priv));
 
                tmp |= DC_BALANCE_RESET_VLV;
                switch (pipe) {
@@ -183,7 +183,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
                default:
                        return -EINVAL;
                }
-               intel_de_write(dev_priv, PORT_DFT2_G4X, tmp);
+               intel_de_write(dev_priv, PORT_DFT2_G4X(dev_priv), tmp);
        }
 
        return 0;
@@ -229,7 +229,7 @@ static int i9xx_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv,
                                         enum pipe pipe)
 {
-       u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X);
+       u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X(dev_priv));
 
        switch (pipe) {
        case PIPE_A:
@@ -246,7 +246,7 @@ static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv,
        }
        if (!(tmp & PIPE_SCRAMBLE_RESET_MASK))
                tmp &= ~DC_BALANCE_RESET_VLV;
-       intel_de_write(dev_priv, PORT_DFT2_G4X, tmp);
+       intel_de_write(dev_priv, PORT_DFT2_G4X(dev_priv), tmp);
 }
 
 static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4a88eb9cd1f88a86ab9b3b984181bae73b73b75a..5670eee4a4988ac7d6f911d25048bfa5beab0850 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1479,7 +1479,7 @@
 
 #define PORT_DFT_I9XX                          _MMIO(0x61150)
 #define   DC_BALANCE_RESET                     (1 << 25)
-#define PORT_DFT2_G4X          _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61154)
+#define PORT_DFT2_G4X(dev_priv)                _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61154)
 #define   DC_BALANCE_RESET_VLV                 (1 << 31)
 #define   PIPE_SCRAMBLE_RESET_MASK             ((1 << 14) | (0x3 << 0))
 #define   PIPE_C_SCRAMBLE_RESET                        REG_BIT(14) /* chv */