}
 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
 
+#define NVME_AEN_SUPPORTED \
+       (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT)
+
+static void nvme_enable_aen(struct nvme_ctrl *ctrl)
+{
+       u32 result;
+       int status;
+
+       status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT,
+                       ctrl->oaes & NVME_AEN_SUPPORTED, NULL, 0, &result);
+       if (status)
+               dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
+                        ctrl->oaes & NVME_AEN_SUPPORTED);
+}
+
 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
 {
        struct nvme_user_io io;
 
        ctrl->oacs = le16_to_cpu(id->oacs);
        ctrl->oncs = le16_to_cpup(&id->oncs);
+       ctrl->oaes = le32_to_cpu(id->oaes);
        atomic_set(&ctrl->abort_limit, id->acl + 1);
        ctrl->vwc = id->vwc;
        ctrl->cntlid = le16_to_cpup(&id->cntlid);
 
        if (ctrl->queue_count > 1) {
                nvme_queue_scan(ctrl);
+               nvme_enable_aen(ctrl);
                queue_work(nvme_wq, &ctrl->async_event_work);
                nvme_start_queues(ctrl);
        }