kselftets/arm64: Use flag bits for features in fp-ptrace assembler code

The assembler portions of fp-ptrace are passed feature flags by the C code
indicating which architectural features are supported. Currently these use
an entire register for each flag which is wasteful and gets cumbersome as
new flags are added. Switch to using flag bits in a single register to make
things easier to maintain.

No functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20241112-arm64-fp-ptrace-fpmr-v2-1-250b57c61254@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S
index 7ad59d92d02b28e4a6b328fde96039329ea8862a..5e7e9c878f2ce797e3ba5f4033a42526830393e6 100644 (file)
--- a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S
+++ b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S
@@ -15,10 +15,7 @@
 
 // Load and save register values with pauses for ptrace
 //
-// x0 - SVE in use
-// x1 - SME in use
-// x2 - SME2 in use
-// x3 - FA64 supported
+// x0 - HAVE_ flags indicating which features are in use
 
 .globl load_and_save
 load_and_save:
@@ -44,7 +41,7 @@ load_and_save:
        ldp     q30, q31, [x7, #16 * 30]
 
        // SME?
-       cbz     x1, check_sve_in
+       tbz     x0, #HAVE_SME_SHIFT, check_sve_in
 
        adrp    x7, svcr_in
        ldr     x7, [x7, :lo12:svcr_in]
@@ -64,7 +61,7 @@ load_and_save:
        bne     1b
 
        // ZT?
-       cbz     x2, check_sm_in
+       tbz     x0, #HAVE_SME2_SHIFT, check_sm_in
        adrp    x6, zt_in
        add     x6, x6, :lo12:zt_in
        _ldr_zt 6
@@ -72,12 +69,16 @@ load_and_save:
        // In streaming mode?
 check_sm_in:
        tbz     x7, #SVCR_SM_SHIFT, check_sve_in
-       mov     x4, x3          // Load FFR if we have FA64
+
+       // Load FFR if we have FA64
+       mov     x4, #0
+       tbz     x0, #HAVE_FA64_SHIFT, load_sve
+       mov     x4, #1
        b       load_sve
 
        // SVE?
 check_sve_in:
-       cbz     x0, wait_for_writes
+       tbz     x0, #HAVE_SVE_SHIFT, wait_for_writes
        mov     x4, #1
 
 load_sve:
@@ -165,8 +166,7 @@ wait_for_writes:
        stp     q28, q29, [x7, #16 * 28]
        stp     q30, q31, [x7, #16 * 30]
 
-       // SME?
-       cbz     x1, check_sve_out
+       tbz     x0, #HAVE_SME_SHIFT, check_sve_out
 
        rdsvl   11, 1
        adrp    x6, sme_vl_out
@@ -187,7 +187,7 @@ wait_for_writes:
        bne     1b
 
        // ZT?
-       cbz     x2, check_sm_out
+       tbz     x0, #HAVE_SME2_SHIFT, check_sm_out
        adrp    x6, zt_out
        add     x6, x6, :lo12:zt_out
        _str_zt 6
@@ -195,12 +195,16 @@ wait_for_writes:
        // In streaming mode?
 check_sm_out:
        tbz     x7, #SVCR_SM_SHIFT, check_sve_out
-       mov     x4, x3                          // FFR?
+
+       // Do we have FA64 and FFR?
+       mov     x4, #0
+       tbz     x0, #HAVE_FA64_SHIFT, read_sve
+       mov     x4, #1
        b       read_sve
 
        // SVE?
 check_sve_out:
-       cbz     x0, wait_for_reads
+       tbz     x0, #HAVE_SVE_SHIFT, wait_for_reads
        mov     x4, #1
 
        rdvl    x7, #1
@@ -271,7 +275,7 @@ wait_for_reads:
        brk #0
 
        // Ensure we don't leave ourselves in streaming mode
-       cbz     x1, out
+       tbz     x0, #HAVE_SME_SHIFT, out
        msr     S3_3_C4_C2_2, xzr
 
 out:

diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c
index c7ceafe5f4712b2c93823c1025f3a23ac0594325..d96af27487fa642e94ecc971f53cb78c233e7b44 100644 (file)
--- a/tools/testing/selftests/arm64/fp/fp-ptrace.c
+++ b/tools/testing/selftests/arm64/fp/fp-ptrace.c
@@ -82,7 +82,7 @@ uint64_t sve_vl_out;
 uint64_t sme_vl_out;
 uint64_t svcr_in, svcr_expected, svcr_out;
 
-void load_and_save(int sve, int sme, int sme2, int fa64);
+void load_and_save(int flags);
 
 static bool got_alarm;
 
@@ -198,7 +198,7 @@ static int vl_expected(struct test_config *config)
 
 static void run_child(struct test_config *config)
 {
-       int ret;
+       int ret, flags;
 
        /* Let the parent attach to us */
        ret = ptrace(PTRACE_TRACEME, 0, 0, 0);
@@ -224,8 +224,17 @@ static void run_child(struct test_config *config)
        }
 
        /* Load values and wait for the parent */
-       load_and_save(sve_supported(), sme_supported(),
-                     sme2_supported(), fa64_supported());
+       flags = 0;
+       if (sve_supported())
+               flags |= HAVE_SVE;
+       if (sme_supported())
+               flags |= HAVE_SME;
+       if (sme2_supported())
+               flags |= HAVE_SME2;
+       if (fa64_supported())
+               flags |= HAVE_FA64;
+
+       load_and_save(flags);
 
        exit(0);
 }

diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.h b/tools/testing/selftests/arm64/fp/fp-ptrace.h
index db4f2c4d750c5c04e3d257e37a1966296ca74956..36ca627e1980f6a384d9ed0f2e9d4bd32d90f893 100644 (file)
--- a/tools/testing/selftests/arm64/fp/fp-ptrace.h
+++ b/tools/testing/selftests/arm64/fp/fp-ptrace.h
@@ -10,4 +10,14 @@
 #define SVCR_SM (1 << SVCR_SM_SHIFT)
 #define SVCR_ZA (1 << SVCR_ZA_SHIFT)
 
+#define HAVE_SVE_SHIFT         0
+#define HAVE_SME_SHIFT         1
+#define HAVE_SME2_SHIFT                2
+#define HAVE_FA64_SHIFT                3
+
+#define HAVE_SVE       (1 << HAVE_SVE_SHIFT)
+#define HAVE_SME       (1 << HAVE_SME_SHIFT)
+#define HAVE_SME2      (1 << HAVE_SME2_SHIFT)
+#define HAVE_FA64      (1 << HAVE_FA64_SHIFT)
+
 #endif