#define bridge_to_rcar_lvds(b) \
        container_of(b, struct rcar_lvds, bridge)
 
+static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg)
+{
+       return ioread32(lvds->mmio + reg);
+}
+
 static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data)
 {
        iowrite32(data, lvds->mmio + reg);
                                     struct drm_bridge_state *old_bridge_state)
 {
        struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge);
+       u32 lvdcr0;
+
+       /*
+        * Clear the LVDCR0 bits in the order specified by the hardware
+        * documentation, ending with a write of 0 to the full register to
+        * clear all remaining bits.
+        */
+       lvdcr0 = rcar_lvds_read(lvds, LVDCR0);
+
+       lvdcr0 &= ~LVDCR0_LVRES;
+       rcar_lvds_write(lvds, LVDCR0, lvdcr0);
+
+       if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) {
+               lvdcr0 &= ~LVDCR0_LVEN;
+               rcar_lvds_write(lvds, LVDCR0, lvdcr0);
+       }
+
+       if (lvds->info->quirks & RCAR_LVDS_QUIRK_PWD) {
+               lvdcr0 &= ~LVDCR0_PWD;
+               rcar_lvds_write(lvds, LVDCR0, lvdcr0);
+       }
+
+       if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) {
+               lvdcr0 &= ~LVDCR0_PLLON;
+               rcar_lvds_write(lvds, LVDCR0, lvdcr0);
+       }
 
        rcar_lvds_write(lvds, LVDCR0, 0);
        rcar_lvds_write(lvds, LVDCR1, 0);