return 0;
 }
 
-int iwl_grab_nic_access(struct iwl_trans *trans)
+bool iwl_grab_nic_access(struct iwl_trans *trans)
 {
        int ret = iwl_grab_nic_access_silent(trans);
        if (unlikely(ret)) {
                u32 val = iwl_read32(trans, CSR_GP_CNTRL);
                WARN_ONCE(1, "Timeout waiting for hardware access "
                             "(CSR_GP_CNTRL 0x%08x)\n", val);
+               return false;
        }
 
-       return ret;
+       return true;
 }
 
 void iwl_release_nic_access(struct iwl_trans *trans)
        unsigned long flags;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       if (!iwl_grab_nic_access(trans)) {
+       if (likely(iwl_grab_nic_access(trans))) {
                iwl_write32(trans, reg, value);
                iwl_release_nic_access(trans);
        }
        unsigned long flags;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       if (!iwl_grab_nic_access(trans)) {
+       if (likely(iwl_grab_nic_access(trans))) {
                __iwl_write_prph(trans, addr, val);
                iwl_release_nic_access(trans);
        }
        unsigned long flags;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       iwl_grab_nic_access(trans);
-       __iwl_write_prph(trans, reg, __iwl_read_prph(trans, reg) | mask);
-       iwl_release_nic_access(trans);
+       if (likely(iwl_grab_nic_access(trans))) {
+               __iwl_write_prph(trans, reg,
+                                __iwl_read_prph(trans, reg) | mask);
+               iwl_release_nic_access(trans);
+       }
        spin_unlock_irqrestore(&trans->reg_lock, flags);
 }
 
        unsigned long flags;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       iwl_grab_nic_access(trans);
-       __iwl_write_prph(trans, reg,
-                        (__iwl_read_prph(trans, reg) & mask) | bits);
-       iwl_release_nic_access(trans);
+       if (likely(iwl_grab_nic_access(trans))) {
+               __iwl_write_prph(trans, reg,
+                                (__iwl_read_prph(trans, reg) & mask) | bits);
+               iwl_release_nic_access(trans);
+       }
        spin_unlock_irqrestore(&trans->reg_lock, flags);
 }
 
        u32 val;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       iwl_grab_nic_access(trans);
-       val = __iwl_read_prph(trans, reg);
-       __iwl_write_prph(trans, reg, (val & ~mask));
-       iwl_release_nic_access(trans);
+       if (likely(iwl_grab_nic_access(trans))) {
+               val = __iwl_read_prph(trans, reg);
+               __iwl_write_prph(trans, reg, (val & ~mask));
+               iwl_release_nic_access(trans);
+       }
        spin_unlock_irqrestore(&trans->reg_lock, flags);
 }
 
        u32 *vals = buf;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       iwl_grab_nic_access(trans);
-
-       iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
-       rmb();
-
-       for (offs = 0; offs < words; offs++)
-               vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
-
-       iwl_release_nic_access(trans);
+       if (likely(iwl_grab_nic_access(trans))) {
+               iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
+               rmb();
+               for (offs = 0; offs < words; offs++)
+                       vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
+               iwl_release_nic_access(trans);
+       }
        spin_unlock_irqrestore(&trans->reg_lock, flags);
 }
 
        u32 *vals = buf;
 
        spin_lock_irqsave(&trans->reg_lock, flags);
-       if (!iwl_grab_nic_access(trans)) {
+       if (likely(iwl_grab_nic_access(trans))) {
                iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);
                wmb();