ARM: mach-imx: clk-imx51-imx53: Retrieve base address and irq from dt

As mx53 is a dt-only SoC, we should retrieve the gpt base address and irq
from the device tree, instead of using the old MX53_IO_ADDRESS method.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index ceaac9cd7b4230859143d951af389908744b7cc2..ce37af26ff8c6931b62e9459d7ffb7df1daf81ab 100644 (file)
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -14,6 +14,9 @@
 #include <linux/clk-provider.h>
 #include <linux/of.h>
 #include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include "crm-regs-imx5.h"
 #include "clk.h"
@@ -472,8 +475,9 @@ CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init_dt);
 
 static void __init mx53_clocks_init(struct device_node *np)
 {
-       int i;
+       int i, irq;
        unsigned long r;
+       void __iomem *base;
 
        clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
        clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -559,14 +563,17 @@ static void __init mx53_clocks_init(struct device_node *np)
        clk_set_rate(clk[esdhc_a_podf], 200000000);
        clk_set_rate(clk[esdhc_b_podf], 200000000);
 
-       /* System timer */
-       mxc_timer_init(MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), MX53_INT_GPT);
-
        clk_prepare_enable(clk[iim_gate]);
        imx_print_silicon_rev("i.MX53", mx53_revision());
        clk_disable_unprepare(clk[iim_gate]);
 
        r = clk_round_rate(clk[usboh3_per_gate], 54000000);
        clk_set_rate(clk[usboh3_per_gate], r);
+
+       np = of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt");
+       base = of_iomap(np, 0);
+       WARN_ON(!base);
+       irq = irq_of_parse_and_map(np, 0);
+       mxc_timer_init(base, irq);
 }
 CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);