drm/amd/display: Fix DP PHY test pre-emphasis not set properly

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index a7c6c980927e25f600cfb549e5c6274ee9ef58f1..25e7d7bc282bb82505058d4b586796ff40a7e78d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -332,14 +332,21 @@ static bool setup_psr(struct dc *dc, const struct dc_stream *stream)
 }
 
 static void set_drive_settings(struct dc *dc,
-               struct link_training_settings *lt_settings)
+               struct link_training_settings *lt_settings,
+               const struct dc_link *link)
 {
        struct core_dc *core_dc = DC_TO_CORE(dc);
        int i;
 
-       for (i = 0; i < core_dc->link_count; i++)
-               dc_link_dp_set_drive_settings(&core_dc->links[i]->public,
-                               lt_settings);
+       for (i = 0; i < core_dc->link_count; i++) {
+               if (&core_dc->links[i]->public == link)
+                       break;
+       }
+
+       if (i >= core_dc->link_count)
+               ASSERT_CRITICAL(false);
+
+       dc_link_dp_set_drive_settings(&core_dc->links[i]->public, lt_settings);
 }
 
 static void perform_link_training(struct dc *dc,

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index e287584ade29c98c57302c3725f6dfa6ecb2f88b..da49be0672d7899f99c09c460b9530e6c60cd17d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -229,10 +229,9 @@ void dp_retrain_link_dp_test(struct core_link *link,
                                        link->link_enc,
                                        SIGNAL_TYPE_DISPLAY_PORT);
 
-                       /* Clear current link setting.
-                        * memset(&link->public.cur_link_settings, 0,
-                        *      sizeof(link->public.cur_link_settings));
-                        */
+                       /* Clear current link setting. */
+                       memset(&link->public.cur_link_settings, 0,
+                               sizeof(link->public.cur_link_settings));
 
                        link->link_enc->funcs->enable_dp_output(
                                                link->link_enc,
@@ -246,6 +245,8 @@ void dp_retrain_link_dp_test(struct core_link *link,
                                        link_setting,
                                        skip_video_pattern);
 
+                       link->public.cur_link_settings = *link_setting;
+
                        link->dc->hwss.unblank_stream(&pipes[i],
                                        link_setting);
                }

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 83d78c2dc24d1526f95e36a5701c8cc72d516ea2..64002268818aade1694eaf641a74ad9d12166d5b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -112,7 +112,8 @@ struct link_training_settings;
 
 struct dc_link_funcs {
        void (*set_drive_settings)(struct dc *dc,
-                       struct link_training_settings *lt_settings);
+                       struct link_training_settings *lt_settings,
+                       const struct dc_link *link);
        void (*perform_link_training)(struct dc *dc,
                        struct dc_link_settings *link_setting,
                        bool skip_video_pattern);

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index 323493b9e129ef3bab481b5c070c75b61ca70a0f..cb5e5953b7ab180647f82598c981a34d675f6399 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -1363,7 +1363,7 @@ void dce110_link_encoder_dp_set_lane_settings(
        cntl.pixel_clock = link_settings->link_settings.link_rate *
                                                LINK_RATE_REF_FREQ_IN_KHZ;
 
-       for (lane = 0; lane < link_settings->link_settings.lane_count; ++lane) {
+       for (lane = 0; lane < link_settings->link_settings.lane_count; lane++) {
                /* translate lane settings */
 
                training_lane_set.bits.VOLTAGE_SWING_SET =