REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
        }
 
+       REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
+                   AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
+
        if (AR_SREV_9280_20_OR_LATER(ah))
                return;
        /*
        }
 }
 
-static void ar5008_set_diversity(struct ath_hw *ah, bool value)
-{
-       u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
-       if (value)
-               v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-       else
-               v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-       REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
-}
-
 static u32 ar9100_hw_compute_pll_control(struct ath_hw *ah,
                                         struct ath9k_channel *chan)
 {
        priv_ops->rfbus_req = ar5008_hw_rfbus_req;
        priv_ops->rfbus_done = ar5008_hw_rfbus_done;
        priv_ops->restore_chainmask = ar5008_restore_chainmask;
-       priv_ops->set_diversity = ar5008_set_diversity;
        priv_ops->do_getnf = ar5008_hw_do_getnf;
        priv_ops->set_radar_params = ar5008_hw_set_radar_params;
 
 
        val = REG_READ(ah, AR_PCU_MISC_MODE2) & (~AR_ADHOC_MCAST_KEYID_ENABLE);
        REG_WRITE(ah, AR_PCU_MISC_MODE2,
                  val | AR_AGG_WEP_ENABLE_FIX | AR_AGG_WEP_ENABLE);
+
+       REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
+                   AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
 }
 
 static void ar9003_hw_prog_ini(struct ath_hw *ah,
        REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
 }
 
-static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
-{
-       u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
-       if (value)
-               v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-       else
-               v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-       REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
-}
-
 static bool ar9003_hw_ani_control(struct ath_hw *ah,
                                  enum ath9k_ani_cmd cmd, int param)
 {
        priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
        priv_ops->rfbus_req = ar9003_hw_rfbus_req;
        priv_ops->rfbus_done = ar9003_hw_rfbus_done;
-       priv_ops->set_diversity = ar9003_hw_set_diversity;
        priv_ops->ani_control = ar9003_hw_ani_control;
        priv_ops->do_getnf = ar9003_hw_do_getnf;
        priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
 
        return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
 }
 
-static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
-{
-       return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
-}
-
 static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
                                        enum ath9k_ani_cmd cmd, int param)
 {
 
        bool (*rfbus_req)(struct ath_hw *ah);
        void (*rfbus_done)(struct ath_hw *ah);
        void (*restore_chainmask)(struct ath_hw *ah);
-       void (*set_diversity)(struct ath_hw *ah, bool value);
        u32 (*compute_pll_control)(struct ath_hw *ah,
                                   struct ath9k_channel *chan);
        bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
 
                sc->sc_flags |= SC_OP_RXAGGR;
        }
 
-       ath9k_hw_set_diversity(sc->sc_ah, true);
        sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
 
        memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);